[SI-LIST] Re: Copper Pours
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Robert.Havlik@xxxxxxxxxxxx" <Robert.Havlik@xxxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Mon, 24 Apr 2006 08:11:33 -0700
Robert,
Using copper pours in signal planes to reduce EMI is one of those may urban
legends that are not true. You are correct about their potential negative
effective on signals.
Who starts these strange rules, anyway?
> [Original Message]
> From: <Robert.Havlik@xxxxxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Date: 4/22/2006 1:26:08 PM
> Subject: [SI-LIST] Copper Pours
>
> I understand copper pours are commonly used on PCB?s for EMC shielding,
> power supplies, and in analog designs, but I have not found any resources
with
> good advice on when a copper pour should or should not be used.
>
> I can see that placing a copper pour connected to a ground plane around
high
> speed signal traces would reduce EMI and also possibly signal coupling,
but it
> also seems that having a ground in close proximity to a signal trace it
could
> also change the characteristic impedance of the transmission line. If the
> copper pour is not a uniform distance around the trace, it seems it could
> potentially cause impedance discontinuities.
>
> Also, I have seen both hatched and solid pours, and I have not seen
anything
> on the advantages and disadvantages of either approach or in what
> circumstances one should be used over the other.
>
> Any advice on copper pour usage or good rules of thumb would be greatly
> appreciated. Thanks.
>
>
> -Robert Havlik
> University of Colorado, Boulder
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