[SI-LIST] Re: Convergence problem after inserting detailed connector model
- From: Yu Liu <yu_liu@xxxxxxxxxxxxx>
- To: julia.nekrylova@xxxxxxxxx
- Date: Thu, 19 Feb 2004 17:39:36 -0800
Hi,
There is a myth about SPICE convergence problem like this one. Actually,
for a strictly passive network consists linear RLC elements, the
convergence problem should never occur - where is the nonlinearity in
the network? The "time step too small" is likely caused by large local
truncation error (LTE) rather than non-convergence. On the other hand,
if the network is not strictly passive (even a linear RLCK network can
exhibit non-passivity), and unfortunately we have seen this happens
quite common in real cases by poor modeling, you can also run into this
"time step too small" problem.
Regards,
Yu
===
Nekrylova, Julia wrote:
>Hello,
>
>
>I've added a detailed connector model to my Hspice deck and started
>getting
>
>"internal timestep too small" error messages. Before that the connector
>was represented just by
>
>RLGC matrix model. Tried different fixes: reduced transition times, set
>initial conditions,
>
>tried gear method, put shunt conductances and capacitances. Some times
>in the past Accurate=1 and
>
>Converge=4 worked for me, but this time nothing seems to help.
>
>
>
>What else I could try? I am pretty sure there are lots of people on the
>list who had similar problems
>
>with their spice decks after adding sophisticated interconnect models.
>
>What could be the most popular solution in this case besides talking to
>the connector company application engineer?
>
>
>
>Thanks a lot,
>
>Julia
>
>
>
>
>
>
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