[SI-LIST] Re: Controlled Impedance Coupon Design
- From: "Ken Willis" <kwillis@xxxxxxxxxxx>
- To: <brian.butler@xxxxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 6 Mar 2003 08:50:19 -0800
H Brian
Besides impedance, another critical aspect is the prop delay
characteristics per layer. This gets really important whey you
are trying to control skew between clock and data lines to 10's
of picoseconds. The impedance coupons could help a lot if, instead
of all the test lines on a layer just being a standard 6" length,
there was an additional line that was a different known length
on each layer. For example if there were an additional test line
4 inches long, then the engineer could figure out with a TDR the prop
delay/inch for the various layers, and could more accurately design
the skew offsets into the layout. I think this will be more and more
important as we go along to higher speeds. This idea has been proposed
on the SI-list more than once. I'm sure people are doing this on their
own today, as I have done in the past.
Ken=20
-----Original Message-----
From: Brian Butler [mailto:brian.butler@xxxxxxxxxxxxxxx]=20
Sent: Tuesday, March 04, 2003 11:28 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Controlled Impedance Coupon Design
To All:
The IPC task group which is rewriting the IPC-2141 Controlled Impedance =
Circuit
Boards and High Speed Logic Design is looking into the need of rewriting =
the
Controlled Impedance Coupon Design Rules (Section 4.7 of current =
document) and
would welcome your input on the following issues concerning controlled
impedance coupon design. Please feel free to comment on any or all of =
the below
listed points.
Potential Topics for Controlled Impedance Design Rules
1) Terminate or un-terminated traces?
2) Test points are plated thru holes?
3) Size of Drilled Hole?
4) Size of pad?
5) Single-ended pitch between signal and ground?
6) Differential pitch and pattern?
7) Differential pattern (no ground reference, one ground reference, =
two
ground references)?
8) Width of coupon?
9) Length of test trace?
10) Use of thieving?
11) Need for consistent orientation of probe pads to eliminate the =
need for
test operators to rotate the probe (repetitive stress)?
12) Bends in trace or no allowed bends?
13) Minimum spacing from one test structure to the next?
14) Type of nomenclature and clearance specifications?
15) Tie all ground/power planes together on coupon?
16) Ideal location of coupon(s) on panel?
17) Square lands to identify grounds/power reference points?
18) Other issues?
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=20
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