[SI-LIST] Component Placement Doubt

  • From: "Lakshmi Narayanan Sowrirajan, TLS-Chennai" <lakshminarayanans@xxxxxx>
  • To: si-list <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 4 Sep 2009 18:22:24 +0530

Hi All,
                Good day to all.
                I have a doubt in the component placement as described below, 
please help me in this.

                My PCB is 24 layers with 8 layers of GND and the board 
thickness is nearly 2.8mm. I have placed a switching regulator operating at 
1100KHz (LT3502)  with 1.8V output and load current of less than 900mA on TOP 
layer and a Differential clock synthesizer (Si5338A) at the BOTTOM layer 
operating at 2.5V. I don't have any through via in this area.

                Please let me know how this placement is going to affect the 
Jitter performance and the quality of clock at the output of the Si5338A. I am 
really confused in this. Please give your concerns / suggestions at the 
earliest as I have my release very near.

                Thanks in advance for your time and clarifications.


Regards
Lakshminarayanan.S

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