[SI-LIST] Re: Causes of Phase Differences in stripline construction

  • From: Scott McMorrow <scott@xxxxxxxxxxxxx>
  • To: Craig Sullivan <csullivan@xxxxxxxxxx>
  • Date: Thu, 08 Oct 2009 17:09:44 -0400

Craig

It would help to know what material is being used, and the frequency 
specified for measurement of phase delta.

Scott

-- 
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax

http://www.teraspeed.com

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Craig Sullivan wrote:
> Hello, 
>  
>
> I have a 2 part problem. Our customer has informed us they are seeing phase
> errors in the assemblies we build for them. The requirement is all channels
> need to have a phase delta of < 14.5 degrees. In other words, the max phase
> - the min phase across 48 channels.
>
>  
>
> Part 1 of the problem is a phase delta in excess of 30 degrees. We have
> found the root cause of this problem to be PCB delamination.
>
>  
>
> Part 2 of the problem is the phase delta around 15-18 degrees. This is
> usually brought back into tolerance by changing an SMT capacitor. 
>
>  
>
> Finding the root cause of part 2 is proving to be rather challenging.
> Originally the specification was < 8 degrees. When the customer started
> seeing failures, they increased the specification to < 14.5. When they saw
> even more failures in addition to the delam, they finally brought it to our
> attention. 
>
>  
>
> In my opinion the stripline construction "should" be rather forgiving. It's
> 1/2 oz, 19.4 mils wide surrounded by ~18 mil dielectrics on each side.
> Though one of my concerns is each trace length is around 14.5 inches and is
> serpentined. In addition, no two serpentine designs exhibit the exact same
> pattern. 
>
>  
>
> Another concern I have is the channels are spread across 3 different layers
> in the stackup (16 channels each on layers 2, 7, and 11). The PCB is 12
> layers. 
>
>  
>
> Layers 2 and 11 have the same stackup:
>
> ==================== Ref
>
>      18 mil core
>
> -------------------- Signal
>
>      5.8 mil pp
>
>      6 mil core
>
>      5.8 mil pp
>
> ==================== Ref
>
>  
>
> Layer 7 is slightly different:
>
> ==================== Ref
>
>      12 mil core
>
>      5.8 mil pp
>
> -------------------- Signal
>
>      18 mil core
>
> ==================== Ref
>
>  
>
> Also to toss another variable in the mix. This board is completely round
> with each channel beginning at the perimeter of the PCB and equidistant from
> the next channel. So with that said, I am aware of the trace orientation in
> regard to weave/glass/resin now becomes a factor as well.
>
>  
>
> So my question to the list is: What are some causes of an increased phase
> spread? Also, any reference material recommendations are welcomed.
>
>  
>
> Thank you,
>
> Craig Sullivan
>
> Manufacturing Engineer
>
> MPL Incorporated
>
> P: 607.266.0480
>
> F: 607.266.0482
>
> csullivan@xxxxxxxxxx
>
>  
>
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