[SI-LIST] Re: Capacitors arrays. worth it or not?

  • From: "Jerry Martinson" <jmartinson@xxxxxxxxxxxxxxxxx>
  • To: <weirsi@xxxxxxxxxx>, <wyjmnls@xxxxxxx>, <jeanpierrepoulin@xxxxxxxxxxx>, "si-list" <si-list@xxxxxxxxxxxxx>
  • Date: Sun, 21 May 2006 00:13:01 -0700

I've always wondered how discrete cap performance is affected if the
caps plates are parallel with the underlying plane or if they are
perpendicular.  I'd think that having them rolled 90 degrees
(perpendicular) might make them perform better in some regions.  I
wonder how this would extend to arrays and whether arrays are configured
rolled or not.  Does anyone know?  I guess an advantage with X2Ys and
IDCs is that you don't have to wonder about this.

Is there an X2Y cap with high capacitance?  All I've seen is small
values using X7R dielectrics - great for high frequency but not so great
down low.  I don't know enough about the underlying technology but I
can't see why this flux cancelling stuff couldn't be used with denser
dielectrics like X5Rs or even our "fair weather friend" Y5Vs and why
they can't go "up" instead of just "out" (I know ESL and ESR might
suffer when you do this but it still might be superior to conventional
discretes).  Maybe I'm in a small application niche but I'm having a
_lot_ more trouble meeting ultra low Z targets down low without
anti-resonance peaking than I am at 100MHz+.

For several years straight, my x-mas wish list included some sort of low
ESL multiterminal cap that could fit right on ads between the vias of a
"interdigitated via checkerboard" 1mm pitch BGA core without having to
use via in pad, skewed dogbones, or consolidated vias.  I think you
could have the body of the part rest over a via without entrapping or
shorting it.  Instead of this, I keep getting these mutliterminal cap
parts that are essentially the wrong pitch for local decoupling under
the tree.  Have I just been naughty or is there a good reason why
Santa's elves can't make this?  =20

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of steve weir
Sent: Friday, May 19, 2006 10:52 PM
To: wyjmnls@xxxxxxx; jeanpierrepoulin@xxxxxxxxxxx; si-list
Subject: [SI-LIST] Re: Capacitors arrays. worth it or not?

If you have found quality sources for 4X cap arrays at two cents, I=20
would sure like to know what they are.  If you have found sources for=20
IDC at those kinds of prices I would REALLY like to know about=20
them.  I think so would anyone else currently buying IDCs.

Steve.
At 06:35 PM 5/19/2006, =3D?gb2312?B?zuLR176q?=3D wrote:
>
>
>Hi,Jean
>     The price of Cap array including four chip is about four times=20
> to single cap. The decoupling effect is bader than single cap for=20
> its inter-mutual coupling. The IDC cap has less inductance. Its=20
> cost is little less than caparray.Two kinds of caps have the same=20
> layout space consuming for requiring 8 vias. for example, 0603=20
> package cap,they save about 25% spaces than single cap.
>
>
>
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