[SI-LIST] Re: CPU-Memory Termination
- From: Chockalingam Selvaraj <chockalingam.s@xxxxxxx>
- To: "Nijagunamurthy, Hithesh (GE Intelligent Platforms)" <hithesh@xxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 1 Feb 2011 11:16:23 +0530
Hi,
For bidirectional data-bus, series termination at both ends make sense.
But the hitch comes with the double voltage drop in the signal line.
Its better you run a SI simulation to rule out the need for any termination as
the decision depends on the signal rise time and the length of the trace.
I am unable to comprehend memory driving the address bus though !!!
Thanks and regards
Chockalingam.S (Ck)
________________________________________
From: si-list-bounce@xxxxxxxxxxxxx [si-list-bounce@xxxxxxxxxxxxx] On Behalf Of
Nijagunamurthy, Hithesh (GE Intelligent Platforms) [hithesh@xxxxxx]
Sent: Tuesday, February 01, 2011 11:06 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] CPU-Memory Termination
Hi Experts,
How do you terminate and what kind of termination to use when both the
CPU and Memory can drive the Address/Data bus.
If CPU is the only driver, using series termination would make sense.
But when Memory is driving, the series termination resistor is not at
all near the driver.
Is the answer not to use termination at all?
Thanks,
-Hithesh
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