[SI-LIST] Re: CPLD getting blown on board

  • From: "Tom Dagostino" <tom@xxxxxxxxxxxxx>
  • To: <weirsi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 7 Jun 2013 09:01:55 -0700

What does electrical over stress mean?  Are inputs blown?  Are outputs
fried?  Or do you have a blown out core?

Tom Dagostino

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-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of steve weir
Sent: Friday, June 07, 2013 8:06 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: CPLD getting blown on board

One more item to list to the many good suggestions offered:  Make sure that
you don't have a power sequencing problem during shut-down as well as power
on.  As it is during power up / power down your device fails, I would go
after the power sequencing, VRM overshoot first.

Steve.
On 6/7/2013 5:38 AM, Sam Pete wrote:
> Hi Friends,
> I am working on a medical board which has multi-core CPU along with other
peripherals.
> we are getting into some issue that CPLD is getting blown out during power
cycle or sometimes during reset.
> out of 210 boards we produced, we have 3 boards exhibiting this issue. The
FA report from CPLD vendor says electrical over-stress...
> The board is not having any hotswap peripherals.... CPLD has 2.5V and 3.3V
banks, 3.3V Core/IO supply comes up first then 2.5V.
> We have gone thru all sorts of checks, negative tests etc., to reproduce
this issue and we were unsuccessful....
> Does anybody faced similar issues earlier? Appreciate if you can provide
some clues...
>
> thanks
> Sam
>
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