[SI-LIST] CISCO SI Engineer Opportunity.

From: "Tomas Diaz (tdiaz)" <tdiaz@xxxxxxxxx>
To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
Date: Tue, 12 Mar 2013 17:09:59 +0000
All-
Please send your resumes directly to me, Tomas Diaz, for consideration for the 
following position:


Job Title: Senior Signal Integrity Engineer
Location: San Jose, CA

Opportunity Snapshot

In this role, you will have the opportunity to work in the hardware 
engineering. You will be part of a dedicated team, open communications, 
empowerment, innovation, teamwork and customer success are the foundations of 
the team. Thus, you set your own limits for learning and achievements.
We are looking for a motivated Senior Signal Integrity Engineer to contribute 
to the development of our next generation product.

http://www.cisco.com/en/US/products/ps10265/index.html

Job Requirements:

- 8+ years of experience in signal integrity with MSEE, Ph. D. Preferred

- Have deep knowledge of signal integrity theories, with proven track record in 
product delivery

- Expert in simulation tools such as ADS, HFSS, CST, HSPICE, Power-SI, Sentinel 
PI and Matlab

- Hands on person who can do both simulations and lab measurements to validate 
the simulation results

- Has done validation of simulations results using TDR, Network Analyzer, 
Oscilloscopes and other lab equipments

- Contribute to the signaling and interconnect technology selection

- Definition and simulation of high speed interconnects using simulation tools

- Assess timing, noise margin, crosstalk, signal loss and signal integrity of 
all clocks and critical data signaling and develop noise and timing budgets.

- Experience in Package and system level power integrity design methodology

- Backplane design experience and analog circuit knowledge are preferred

- Excellent documentation, communication skills

- Familiar with multi gigabit serial busses, including PCIe, XAUI, KR, XFI, and 
SFI

- Familiar with package and board co-design methodology

- Familiarity with high speed I/Os such as HSTL, SSTL, LVDS, LVPECL, and serial 
busses

- Familiar with Memory technologies such as DDR is preferred

- Ability of working effectively with other disciplines a must

- Not be afraid to take risks, and think out of the box

- Effective interaction with other engineering discipline skills a must




Tomas Diaz
Career Services Manager/Talent Advisor
Americas Staffing
Cisco Systems
tdiaz@xxxxxxxxx<mailto:tdiaz@xxxxxxxxx>
408.853.3451

[cid:image001.png@01CDCE49.B889B760]

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[SI-LIST] CISCO SI Engineer Opportunity.

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