Hi, I'm looking for a document that could give me practical detail about CAF for low voltage signaling (<24V). The paper that I've read so far are focuses on high voltage. How can we avoid that CAF affect serdes signal (like 1 GbE or SATA)? PCB fab recommend 19.5 mil separation minimum between drill hole wall. My guess is that CAF will not affect the signal before any part on the PCB will reach MTBF. What's your opinion on this? Best regards, Marc-André Filion | Hardware designer | Kontron Canada | T 450 437 5682 x2243 | E marc-andre.filion@xxxxxxxxxxxxxx <mailto:marc-andre.filion@xxxxxxxxxxxxxx> Kontron Canada Inc 4555 Rue Ambroise-Lafortune Boisbriand (Québec) J7H 0A4 The information contained in this document is confidential and property of Kontron Canada Inc. Any unauthorized review, use, disclosure or distribution is prohibited without express written consent of Kontron Canada Inc. If you are not the intended recipient, please contact the sender and destroy all copies of the original message and enclosed attachments. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu