[SI-LIST] Bus Routing
- From: "Vikas Chandra Rao" <vikas@xxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 22 Sep 2003 23:53:24 +0530
Dear all,
I want help regarding the address, data, control and clock signals routing
from a DSP to SDRAM(133MHz) and Compact Flash(CF) card.
All the address, data and control signals are going from DSP to SDRAM as
well as CF card. As of now, I have routed the above said signals from DSP to
Compact Flash with stubs in between to SDRAM.
1. What should be the range of stub lengths?
2. What should be the trace lengths from DSP to SDRAM?
3. What should be the total trace lengths of the bus?
4. What should be the acceptable tolerance range within the bus? I mean the
difference between the trace lengths of each and every other signal.
Regards,
Vikas.
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