Bob, I agree that scanning a design after completion can have value to see what might have fallen through the cracks. We do both rule development and post layout checks for our customers resulting in robust designs free of nasty surprises. ( < Alert! Shameless Teraspeed plug. Alert! > ) Rules are just tools to help with achieving a goal. We treat them as such and use our noggins to adjust them where it makes sense. When we develop and adhere to appropriate design rules, we still occasionally find the need to tweak after post layout checks. This usually happens when we have reduced the margin in the rules to accommodate requirements for total size, layer count reduction, lower cost processes etc. Usually the adjustments called for are minor and pain free. Had we not had the rules in the first place the iterations would be much more painful and time consuming. For some excellent insight on the sensible development of rules based on hard metrics, I highly recommend Eric's book "Signal Integrity Simplified". Best Regards, Steve. At 10:30 PM 5/18/2006, Robert Sefton wrote: >Lee - > >I'd argue that post-layout checks are valuable for most boards. Most boards >(based on my experience) don't require extensive pre-layout planning, and >having the ability to scan the layout for major problems as a CYA just >before fab makes sense for these situations. Nobody calls you unless they >have special concerns, but most designs out there are still not at the >threshold that requires extensive pre-layout planning. > >To address the OP's question. I'm a consultant always looking for >cost-effective EDA tools. About three years ago I took a gamble (because the >price was right) and bought Omega Plus from Quantic-EMC (which includes >BoardScan). They're basically an academic group, and I think the underlying >algorithms in their software are top-notch, but the usability (i.e., user >interface), stability, and support (I think they're a 2-man shop) are weak. >At the time I bought they had no IBIS support and had very limited ability >to import various PCB layout formats. I would encourage you to look >elsewhere. > >Bob S. > >-----Original Message----- >From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On >Behalf Of Lee Ritchey >Sent: Thursday, May 18, 2006 2:30 PM >To: Hill, John; si-list@xxxxxxxxxxxxx >Subject: [SI-LIST] Re: BoardScan by Quantic and HyperLynx by Mentor > >John, > >If you are wainting until after layout is complete to do SI analysis, I'm >afraid the horse has already fled the barn. Yes, there are tools that will >look after layout, but it's at the wrong end of the process. > > > > [Original Message] > > From: Hill, John <jhill@xxxxxxxxxx> > > To: <si-list@xxxxxxxxxxxxx> > > Date: 5/18/2006 2:34:19 PM > > Subject: [SI-LIST] BoardScan by Quantic and HyperLynx by Mentor > > > > Hello all, > > This is my first time writing to this List, but here goes: > > > > Our PCB Layout house has suggested using BoardScan by Quantic for > > Signal Integrity and Crosstalk analysis. I think HyperLynx by Mentor > > would be the better tool. Which tool is better and why? > > > > Best regards, > > > > John > > > > > > --------------------------------------- > > The information in this email and attachments hereto may contain > > legally >privileged, proprietary or confidential information that is intended for a >particular recipient. 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