[SI-LIST] Re: Best PDS impedance for package damping

  • From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
  • To: "'Larry.Smith@xxxxxxx'" <Larry.Smith@xxxxxxx>,steve weir <weirsp@xxxxxxxxxx>
  • Date: Fri, 13 Feb 2004 14:31:02 -0800

How can you measure the inductance, capacitance and resistance profile as
seen on die with a flip chip package ?

-----Original Message-----
From: Larry Smith [mailto:Larry.Smith@xxxxxxx]
Sent: Friday, February 13, 2004 12:38 PM
To: steve weir
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Best PDS impedance for package damping

Another way to get this information is to measure it yourself.  By 
mounting a processor or major ASIC on a bare fab, it is not difficult 
to find the equivalent inductance, capacitance and resistance of the 
component with a VNA S21 measurement.  Istvan and I have documented 
the techniques for doing this in various papers.  Be sure and bias the 
component with VDD because the capacitance across the device's power 
terminals changes greatly between zero bias and normal bias.  By doing 
this, you have measured the chip/package resonance frequency 
(sometimes called cut-off) for the component on your board.  This 
gives you great insight into what you need to do at the PCB level to 
provide power to the part.  It also tells you what you cannot do (the 
frequency beyond which the packaged chip is on it's own).
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