Dear Mikhail, I assume you are working with a bare board (no components installed). In that case, I have an idea for you. I worked with an engineer from Apple many years ago with a similar complaint. Here's what happened. Perhaps it relates in some way to your story. Call him Bob. His was a four-layer board, with a stackup like this: TOP SIG -- thin dielectric GROUND -- *** very thick dielectric POWER -- thin dielectric BOTTOM SIG The POWER-GROUND spacing was much larger (5x) than the spacing from each signal layer to its respective reference plane. Bob measured, using a hand-held capacitance meter at a low frequency, the capacitance from POWER to GROUND and saw, like you, about twice as much capacitance as he expected. Bob's board dimensions were approximately 8x10 in., with a POWER-GROUND spacing of 0.050 in. Fringing fields were not significant. Here's what happened. The board was covered with a dense maze of trace, top and bottom. A traces that stays entirely on the TOP layer of Bob's board cannot affect the POWER-GROUND capacitance, except through the tiny perturbation caused by its endpoint vias (this was a through-hole board). Same for traces that stay entirely on the bottom layer. But, what about traces that change layers? Many of the signals were routed partway on the TOP layer before popping through vias onto the BOTTOM, where they ran an additional distance before terminating. These layer-changing traces enjoy a certain capacitance from TOP to GROUND, which they then connect (in series) to a second capacitance leading from BOTTOM to POWER. Since the traces were set much closer to the planes than the natural POWER-GROUND spacing, they exert a disproportionately large effect on the total POWER-GROUND capacitance. There are two ways to determine if this might be a factor for your board. 1) Add up the capacitances of all traces passing over your polygon on layer one. Remember that the capacitance of each of those traces will have, in series with it, a second capacitance representing its connection to some other plane. 2) Drill out all the vias passing through the polygon, and cut any traces that leave the edge of the polygon. That isolates it from trace capacitance. I hope that this brief note helped you, and if not, at least that it made pleasant reading. Let me know what you find out. Best regards, Dr. Howard Johnson, Signal Consulting Inc., tel +1 509-997-0505, howie03@xxxxxxxxxx www.sigcon.com -- High-Speed Digital Design seminars, publications and films -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Mikhail Matusov Sent: Thursday, September 09, 2010 11:35 AM To: steve weir Cc: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Basic question on power plane capacitance Steve, I am measuring on a non-populated board with a simple capacitance meter, i.e. at some low frequency. I might be off in thickness by 1 mil (4 instead of 5), but that won't explain doubling the capacitance. For the dielectric constant of FR-4 I used 4.3. I doubt it can get much bigger than that. /Mikhail ----- Original Message ----- From: "steve weir" <weirsi@xxxxxxxxxx> To: "Mikhail Matusov" <matusov@xxxxxxxxxxxx> Cc: <si-list@xxxxxxxxxxxxx> Sent: Thursday, September 09, 2010 2:21 PM Subject: Re: [SI-LIST] Basic question on power plane capacitance > Assuming that you are measuring while the board is unpowered and > unpopulated, the variables are the actual thickness, and composition of > the dielectric layer. If you have some IC attached to the polygon all > bets are off. > > Steve. > > Mikhail Matusov wrote: >> Hi all, >> >> I have a small polygon in a plane layer of a multi-layer PCB. There is a >> solid ground plane underneath it and the top signal layer above. I have >> calculated from the basic plane capacitance equation that the plane >> capacitance for this polygon should be in the range of 420 pF. However, I >> am measuring 890 pF with one meter and 1 nF with another. I was wondering >> what am I doing wrong? >> >> >> Thanks, >> /Mikhail >> ------------------------------------------------------------------ >> To unsubscribe from si-list: >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field >> >> or to administer your membership from a web page, go to: >> //www.freelists.org/webpage/si-list >> >> For help: >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field >> >> >> List technical documents are available at: >> http://www.si-list.net >> >> List archives are viewable at: >> //www.freelists.org/archives/si-list >> Old (prior to June 6, 2001) list archives are viewable at: >> http://www.qsl.net/wb6tpu >> >> >> > > > -- > Steve Weir > IPBLOX, LLC 150 N. Center St. #211 > Reno, NV 89501 www.ipblox.com > > (775) 299-4236 Business > (866) 675-4630 Toll-free > (707) 780-1951 Fax > > > ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu