[SI-LIST] Re: BGA vias outside the package
- From: "Chris Cheng" <Chris.Cheng@xxxxxxxx>
- To: "Ryan Sequeira" <ryan.sequeira@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 28 Jan 2009 17:30:16 -0800
You may find the following useful.
http://www.xilinx.com/support/documentation/white_papers/wp165.pdf
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ryan Sequeira
Sent: Wednesday, January 28, 2009 3:20 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] BGA vias outside the package
Importance: High
Would like to understand the effects of supplying power and ground to
the
BGA by connecting
vias to the VCC/GND plains and traces outside the BGA package.
Pros: Allows for larger vias outside the package.
Cons: Compromised noise performance through trace length added to
VCC/GND
trace length.
Is there something else that needs to be taken care of....
The BGA device is a CPLD, IO=3.3V, Core=1.8V, Fmax = 180MHz, VCCO(3.3V)
-
11
pins, VCC(1.8V) - 4 pins, GND - 15 pins
The device is a 132csBGA, 0.5mm pitch, 0.3mm pad. So cannot afford to
drop
the vias within the BGA area. Microvias would be too expensive...
Ryan
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