[SI-LIST] Re: Assymetric stip line
- From: Istvan Novak <istvan.novak@xxxxxxx>
- To: "abin.cv" <abin.cv@xxxxxxxxxxxxxxxxxx>
- Date: Sat, 20 Jun 2009 09:21:46 -0400
Hi,
The split plane being further away from the trace layer certainly does
help, but the ratio being only 12mils to 8mils tells us that the
improvement will be limited. If the 100MHz and 200MHz signaling is
generated from the 3.3V rail, it can probably live with the noise on a
well-bypassed 3V rail. In that case the limitation becomes the
increased crosstalk among traces as you cross the split with the bus.
The stackup portion included in your e-mail suggests that this is part
of a bigger stackup with more layers. If that is the case, the layer(s)
beyond Layer 3 will make a difference in the split behavior. If you
have a solid ground plane on Layer 4 (at least in the area where you
have the split in Layer 3, the impact of split will be less. You can
read more about this in the paper "Examining the Impact of Split Planes
on Signal and Power Integrity" posted at
http://www.electrical-integrity.com/ >> Paper download.
Best regards,
Istvan Novak
SUN Microsystems
abin.cv wrote:
> hi,
> Assymetric stip line
>
> Layer 1 GND
> Dielectic 8mils
> Layer 2 Signal (100MHz to 200MHz)
> Dielectric 12mils
> Layer 3 Power (Split plane 3.3V and GND)
>
> The high speed signals (Around 50 signals) in the Layer 2 encounters split in
> the
> layer 3. The split width is 10mils. Please let me know whether this split
> will
> have serious impact on the signal quality.
>
> More over the split plane is 12 mils away from the signal layer. But the
> Full GND
> plane (Layer1) is near to the signal. Won't the signal will take this GND
> plane as reference
> for their return current.
>
>
> Thanks in advance
>
>
>
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