[SI-LIST] Asian IBIS Summit (Taipei) - Fourth Announcement
- From: "Bob Ross" <bob@xxxxxxxxxxxxx>
- To: <ibis@xxxxxxx>, <ibis-users@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 25 Oct 2013 17:03:44 -0700
To All:
The IBIS Open Forum is holding its fourth Asian IBIS Summit Meeting in
Taiwan. We are meeting again in Taipei on Tuesday, November 19, 2013.
Several companies listed below are co-sponsoring this major event
to be held at the Sherwood Hotel in Taipei.
The Tentative Agenda and Program is given below.
Other Asian IBIS Summit meetings are scheduled for:
Shanghai, P.R. China, Friday November 15, Parkyard Hotel
Yokohama, Japan, Friday, November 22, Pacifico Yokohama
Lance Wang
IO Methodology
Bob Ross
Teraspeed Consulting Group
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ASIAN IBIS SUMMIT (TAIPEI)
FOURTH CALL FOR PARTICIPATION
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A S I A N I B I S S U M M I T ( T A I P E I )
Time/Date: Tuesday, November 19, 2013, 8:00 AM to 4:30 PM
Meeting starts at 8:30 AM
Location: Sherwood Hotel
11 Min Sheng E Road, Sec. 3
Taipei, Taiwan
http://www.sherwood.com.tw/
Room: Tentatively Ballroom D
Content: Presentations and Discussions
Purpose: Solicit and exchange IBIS and interconnect model related
information and ideas.
Primary Sponsor
ANSYS
Co-sponsors (in alphabetical order):
Cadence Design Systems
Intel Corporation
IO Methodology
Synopsys
Cost: FREE, including refreshments and buffet lunch
Vendors: Some vendors will have information tables outside the
meeting room
Contact us for details regarding sponsorship.
BACKGROUND
We have held many successful Summit meetings across Asia in
previous years. This will be our fourth meeting in Taiwan where
many national and international high technology companies have
operations.
Our objective is to reach out internationally to communicate with
the local experts and to learn of regional concerns.
CONFERENCE LANGUAGE
The conference language is English, but we will plan for technical
translations in English and Chinese. So presenters can optionally
deliver in Chinese as long as an English version of the material is
available.
IBIS SUMMIT
This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations will be archived in an electronic format on our
Summits site, and minutes of the meeting will be issued. However,
no formal decisions requiring votes will be planned.
CALL FOR PARTICIPANTS
People involved in IBIS and interconnect model development, EDA
tool development, and digital circuit design are invited to
participate in the Summit meeting. If you plan to participate,
please register using the information below (in English):
Name:
E-mail address:
Company:
Top-level Web Link:
Country:
Send to BOTH:
Lance Wang, IO Methodology lwang@xxxxxxxxxx
Bob Ross, Teraspeed Consulting Group bob@xxxxxxxxxxxxx
SIGNUP DEADLINE: November 15, 2013
AGENDA
8:00 - 8:30 Vendor table setup and tables
8:00 - 8:30 Sign in
8:30 - 12:00 Presentations
12:00 - 13:30 Free buffet lunch, vendor tables
13:30 - 16:30 Presentations
TENTATIVE PROGRAM
Intel Corporation
"Introducing IBIS 6.0"
Teraspeed Consulting Group
"IBIS Summary Documents"
IO Methodology
"More on IBIS Modeling for Load-Dependent Current-Mode
Differential Drivers"
Teraspeed Consulting Group and Cadence Design Systems
"Combined I-V Table Checking Problem"
Agilent Technologies
"Modeling, Extracting and Verification of VCSEL Model for
IBIS AMI"
Cadence Design Systems
"An Advanced Behavioral Buffer Model with Over-Clocking
Solution"
"IBIS Model for IO-SSO Analysis"
ANSYS
Presentation to be determined
LIST OF NEARBY HOTELS AND TRAVEL
Hotels in all price ranges can be found through internet searches.
The conference hotel link is
http://www.sherwood.com.tw/
-----------------------------------------------------------------
--
Bob Ross
Teraspeed Consulting Group, LCC
http://www.teraspeed.com
bob@xxxxxxxxxxxxxx
Direct : 503-246-8048
Teraspeed Labs: 971-279-5325
Headquarters: 401-284-1827
Teraspeed is a registered service mark of Teraspeed Consulting Group LLC
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