All:
Attached is the tentative Agenda for a full meeting with 12
presentations. We look forward to seeing you in Shanghai.
Registration information is at the end.
Lance and Bob
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A S I A N I B I S S U M M I T I N F O R M A T I O N
Time/Date: 8:15 - 17:30, Friday, November 11, 2016
Location: Parkyard Hotel Shanghai
699 Bibo Road
Zhangjiang Hi-Tech Park
Shanghai 201203
P.R. China
Rooms: Ballroom ABC (Look for signs)
Sponsors:
Huawei Technologies (Primary)
Cadence Design Systems
IO Methodology
SPISim
Synopsys
Teledyne LeCroy
Xpeedic Technology
ZTE Corporation
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I B I S S U M M I T M E E T I N G A G E N D A
8:15 SIGN IN
- Vendor Tables Open at 8:30
8:45 WELCOME
- Liu, Shuyao
(Huawei Technologies, PRC)
- LaBonte, Mike (Chair, IBIS Open Forum)
(Signal Integrity Software (SiSoft) USA)
9:00 IBIS Chair's Report
LaBonte, Mike (Signal Integrity Software (SiSoft), USA)
9:25 IBIS Model Simulation with RLC_dut
Chen, Xuefeng (Synopsys, PRC)
9:55 Case Study: Modeling IBIS for Open_drain True
Differential Pair Buffer
Wang*, Lance; Liang**, Yan
(*IO Methodology and **Maxim Integrated, USA)
[Presented by Wang, Lance (IO Methodology, USA)]
10:20 BREAK (Refreshments and Vendor Tables)
10:40 Differential Modeling Flow with Series Model in Verilog-A
Huang*, Wei-hsing and Gupta**, Sanjeev
(*SPISim, USA and **Sigintegrity Solutions, India)
[Presented by Huang, Wei-hsing (SPISim, USA)]
11:10 IBIS-AMI Model Generation with Quality
Liang, Skipper (Cadence Design Systems, ROC)
[Presented by Wen, Yitong (Cadence Design Systems, PRC]
12:00 FREE BUFFET LUNCH (Hosted by Sponsors)
- Vendor Tables
13:30 Suggestion on Issuing VSR/CAUI-4 Based IBIS-AMI Model
Xu, Zhengrong (Huawei Technologies, PRC)
13:50 Necessity for Integrating FEC Functionality for PAM4 in
AMI Simulations
Dong*, Xiaoqing; Huang**, Nick
(*Huawei Technologies,
**Shenzhen Zhongzeling Electronics, PRC)
Presented by Huang, Nick
(Shenzhen Zhongzeling Electronics, PRC)]
14:10 The Impact of Channel Performance to 56G PAM4 Systems
Yin, Changgang; Zhu, Shunlin (ZTE Corporation, PRC)
[Presented by Yin, Changgang (ZTE Corporation, PRC)]
15:00 BREAK (Refreshments and Vendor Tables)
15:20 Achieving Full System Signal Integrity for High Speed
Backplane System
Dai, Wenliang (Xpeedic Technology, PRC)
15:50 On-Die Decoupling Model Improvements for IBIS Power
Aware Models
Wolff#, Randy; Viscardi##, Aniello
(Micron Technology; #USA, ##Italy)
[Presented by Wang, Lance (IO Methodology, USA)]
16:15 IBISCHK6 V6.1.3 and Executable Model File Checking
Ross, Bob (Teraspeed Labs, USA)
[Presented by LaBonte, Mike
(Signal Integrity Software (SiSoft), USA)]
16:40 Touchstone Conversion Wrapper
Ekholm, Anders (Ericsson, Sweden)
17:05 DISCUSSION
17:20 CONCLUDING ITEMS
17:30 END OF IBIS SUMMIT MEETING
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To Register by November 8, 2016:
Name:
E-mail address:
Company:
Top-level Web Link:
Country:
Send to BOTH:
Lance Wang, IO Methodology Inc. lwang@xxxxxxxxxx
Bob Ross, Teraspeed Labs bob@xxxxxxxxxxxxxxxxx
--
Bob Ross
Teraspeed Labs
www.teraspeedlabs.com <http://www.teraspeedlabs.com/>
bob@xxxxxxxxxxxxxxxxx
Direct: 503-246-8048
Office: 971-279-5325
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