[SI-LIST] Antwort: Re: Questions about interplane capacitance
- From: Andreas.Lenkisch@xxxxxxxxxx
- To: Istvan Novak <istvan.novak@xxxxxxxxxxx>
- Date: Wed, 12 Mar 2008 21:42:09 +0100
Istvan,
I'm wodering a little about your comments to the service radius.
Independant if the impedance is resistive, we have still a propagation
time which would limit the service radius from my understanding.
Do I'm wrong?
regards
Andreas
Istvan Novak <istvan.novak@xxxxxxxxxxx>
Gesendet von: si-list-bounce@xxxxxxxxxxxxx
11.03.2008 13:14
An
Joel Brown <joel@xxxxxxxxxx>
Kopie
si-list@xxxxxxxxxxxxx
Thema
[SI-LIST] Re: Questions about interplane capacitance
Joel,
Just one quick comments to the good summary from Steve:
While considering planes and bypass capacitors in terms of effective
capacitances and inductances is a
valid approach, we need to keep in mind that focusing on the capacitive
or inductive nature of parts
without looking at the wider picture misses a very important and useful
class of solutions, namely that
of matched transmission lines. As it was pointed out earlier several
times on the SI list, the best
(self) impedance for a power distribution network is a resistive one,
neither capacitive, nor inductive.
We can get resistive impedance from a matched transmission line,
regardless of its capacitance and
inductance, and in such cases the notion of 'service area' of parts
become meaningless: you can put
bypass components further away from the active devices without
sacrificing performance.
Regards,
Istvan Novak
SUN Microsystems
Joel Brown wrote:
> Interplane capacitance is frequently cited as the only effective bypass
> capacitance on a PCB at frequencies above 200 MHz.
> I am currently working on a design which brings up some questions
regarding
> interplane capacitance.
>
> 1. Power planes normally carry "standard" voltage rails that are used
> throughout a board such as +5V and +3.3V.
> High speed ICs usually have core voltages that are local to the IC and
are
> provided by a local regulator which converts the standard rail to the
core
> voltage (example 3.3 to 1.8V).
> The local core voltage is distributed on a plane area that is local to
the
> IC and therefore is small in area (0.25 sq in or less) which results in
a
> very small amount of interplane capacitance.
> Is this very small amount of capicitance effective for bypassing the IC?
I
> am sure it depends somewhat on the current waveform being drawn by the
IC
> but this can only be estimated because semiconductor manufacturers do
not
> provide current consumption profile as a function of frequency. To make
> matters worse, some ICs have several different VCC pins which the
> manufacturer recommends connecting to separate networks of bypass caps
and
> ferrite beads. This cuts the power distributuion up even more resulting
in
> less (practically zero) interplane capacitance. It is somewhat ironic
that
> the the voltages such as +5V and +3.3V which are required at points
across
> the whole board and therefore have the most interplane capacitance are
also
> the voltages which have least requirement for interplane capacitance
because
> they do not directly supply high speed rails.
>
> 2. There has been a lot of emphasis on reducing the mounted inductance
of
> bypass capacitors. Even with this reduced inductance they are still only
> effective up to several hundereds of MHz at which point the interplane
> capacitance becomes the only bypass capacitance mechanism. However there
is
> inductance between the connection of the IC to the planes. This
inductance
> consists of vias and package inductance. I did look for some numbers for
> package inductance and did not find much, it seems to be a closely held
> secret. Also it is unknown how much bypass capacitnace is internal to
the IC
> package. Just for example if we assume 250pH for the vias and 500 pH for
the
> package, then the impedance at 500 MHz would be 2.36 Ohms. This seems
rather
> high for the interplane capacitance to be of much benefit.
>
> In summary how much interplane capacitance is needed to be beneficial,
and
> why is it beneficial given the inductance in the vias and package?
>
> Thanks - Joel
>
>
>
>
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