[SI-LIST] Antw: Re: Capacitors and Anti-resonance

  • From: "Robert Nowak" <RNowak@xxxxxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 30 Jul 2003 10:52:35 +0200

Hi Daniel,

I think it's not a good idea to place widely separated values
of caps on a printed circuit board.
If you use logic with 1ns edge speed (rise/ fall times), the egde speed def=
ine
the guidelines up to which frequency your power distribution system (PDS) m=
ust
work. But the starting frequency must be zero (DC)!=20
So i think you get problems if you think it is enough to look at the edge s=
peed
 (FKnee =3D 0.5/Tr =3D 0.5/1ns =3D 500MHz). The data on buses in a system c=
hange
not with the edge speed. They are much slower. You must also consider the
lower frequencies. A good PDS must work from DC to FKnee !
The frequencies at which the antiresonance effect occurs fall normaly in th=
e
same range as your data on the buses change! Be carefully!

We use at our company three values of X7R or X5R 0805 and 0603 SMD ceramic =
capacitors=20
per decade for decopling to decrease the antiresonance effect.
 (10=B5F, 4.7=B5F, 2.2=B5F, 1=B5F, 470nF, 220nF and 100nF)
We don't use smaller capacitance values as 100nF(X7R) in a 0603 case becaus=
e,
they have a higher  ESR value. The ESL value is approximately the same
for all values in a case (larger values have a lower ESL because they use
more plates and have a thinner fill layer at the capacitor top and bottom.
Capacitor manufactors fill the free space in a capacitor with dielectric ma=
terial
to get the specifierd capacitor thickness.The tinner the fill, the smaller =
the
current loop, the smaller the ESL).
A 10 nF 0603 X7R and a 100 nF 0603 X7R capacitor have nearly the same
impedance at 100Mhz (0.55 Ohm 100nF / 0.47 Ohm 10nF calculated with
AVX SpicCap http://www.avx.com/SpiApps/spicap/ ).
So i think you get nothing, if you use smaller capacitor values for
decopling. Only the ESR and the ESL value counts.

Regards

Robert




>>> Daniel.Paradis@xxxxxxxxxx 07/30 1:55   >>>
Well I did my homework
in "High-Speed Digital Design" by H. Johnson & M. Graham. (12th printing)
It is said p. 260...
" a rising edge of 1ns propagating in FR-4 material has a length of about l=
=3D
6 in.
No benefit will be derived in this example from a capacitor grid spaced
further apart than l/12 =3D 0.5 inch"

Now if I follow the same logic...
for a 1 ns system I can use different values of caps for every sections=20
if
they are spaced apart by more than 0.5inch
without risking any antiresonance effect.

Does it make sense?
Anybody?


>  -----Original Message-----
> From:         Paradis, Daniel =20
> Sent: Tuesday, July 29, 2003 9:58 AM
> To:   'si-list@xxxxxxxxxxxxx'=20
> Subject:      Capacitors and Anti-resonance
>=20
> I started to use only 0.1uF decoupling caps on our latest designs.
> This is to avoid the anti-resonance effect that occurs when using 2
> different caps near each other.
> The rule of thumb is to use the largest cap available for the package. 
>=20
> So far I got good results, but I was wondering....
>=20
> Is-there a simple way to determine the distance between 2 different
> decoupling caps beyond which there is no anti-resonance effect?
>=20
> In other words..
> Say that I stick to this general rule of using only one cap.
> It seems to me that there could be exceptions to that rule.
> In the case of a high speed clock buffer for instance;=20
> I could need 0.0047uF instead of 0.1uF
> If this clock buffer is located far from other parts of the design.=20
> Can I avoid anti-resonance?
>=20
>=20
> Daniel Paradis
> Staff Electrical Engineer
> Digital Subscriber Networks
>=20
> Scientific-Atlanta, Inc.
> 5030 Sugarloaf Parkway, ATL 1.3468
> Lawrenceville, GA 30042
> Tel: (770) 236-7896
> Fax: (770) 236-2449
>=20
>=20


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