[SI-LIST] Re: Antw: Embedded uStrip - double check me
- From: "Chris McGrath" <chris.mcgrath@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 6 Nov 2003 06:36:27 -0800
Robert (and other Hyplerlynx 7.0 users),
When calculating trace width/spacing and stackup parameters for the
purpose of dense routing, do you turn on the option to account for PCB
fabrication effects or not? I have found that the parameters that our
PCB fab house will accommodate is more in line with the option turned ON
and if the option is OFF the parameters are much more conservative (and
yields a lower routing density).
Along that same line, I have noticed that the plating on the top and
bottom layer does not have as significant an effect on the impedance as
expected. For 0.5 oz copper plating on a 0.5 oz/4 mil copper trace, I
would expect the trace to be in the area of 5 mils with the plating but
the numbers don't exactly line up. Has anybody else dealt with this?
Thanks,
Chris
> -----Original Message-----
> From: Robert Nowak [mailto:RNowak@xxxxxxxxxxxxx]=20
> Sent: Thursday, November 06, 2003 2:48 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Antw: Embedded uStrip - double check me
>=20
>=20
> Hello Bill,
>=20
> I calculate your microstrip line with Hyperlynx 7.0 and get=20
> Z0 =3D 53.6 ohm.
>=20
> Regards,
> Robert
>=20
>=20
> >>> "bdempsey85" <bdempsey85@xxxxxxxxxxx> 11/06 1:40 >>>
> I would like a double check on my coated uStrip impedance=20
> calculations. I am getting feedback from my PCB fabricator=20
> that my numbers are >10% off.
>=20
> Here are the parameters:
> 5 mil wide trace, 0.5 foil with add'l 1oz plating (approx 2.1 mils
> thickness)
> 4 mil trace to plane, Er ~ 4.3
> LPI soldermask ~ 0.8 mils thick
>=20
> I compute 51 ohms...how about you?
>=20
> Thanks,
> Bill
>=20
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