[SI-LIST] Re: Antipad dimensions

  • From: "Lambert Simonovich" <bertsimonovich@xxxxxxxxxx>
  • To: "'Karthik Raj Guruchandran'" <karthik.guruchandran@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 8 Mar 2010 19:25:51 -0500

Karthik,

For high speed design in the GHz regime, excess via capacitance is the
issue. The distributed capacitance associated with the via anti-pads of each
reference layer over the length of the vias that affect the its impedance.
The closer the antipad is to the via barrel, the higher the capacitance and
the lower effective via impedance. The lower impedance causes an impedance
mismatch and translates into noise in the form of reflections and
potentially lower BER performance. 

Usually, the practice is to make the anti-pad as large as possible without
compromising routability of other nearby traces. I.E. any traces routed near
the via that needs a good reference plane for return current. More often
than not, the component footprint will determine maximum antipad dimensions.
If there are no mechanical restrictions, there will usually be a sweet spot
where increasing the antipad size beyond a certain diameter diminishes any
further advantage. In any event, a 3D field solver is needed to determine
this sweet spot if the design is that critical. Often oval anti-pads are
used when there are routing restrictions for example backplane connector
pinfield footprints.

Finally, if your design has long via stubs (not a good idea for muti-Gb
links), this excess distributed capacitance in the stub section will
translate into a higher effective dielectric constant, and tend to lower the
1/4-wave resonant frequency caused by the length of the stub. Resonant
frequencies at or near 1/2 the bit-rate will destroy the received eye.
Minimizing via stubs through back-drilling is a common practice and is the
best thing you can do to improve channel response even more so than
maximizing the anti-pads. 

Regards,

Bert Simonovich 
Backplane Specialist and Founder 
LAMSIM Enterprises Inc.
http://lamsimenterprises.com/index.html

  

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Karthik Raj Guruchandran
Sent: March-08-10 12:16 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Antipad dimensions

Hello all,
What would you consider to be the most important factors that would have an
impact on antipad clearance dimension (in vias), apart from fabricators
capability? In other words, what do we need to consider to determine antipad
clearance dimension?

I am trying to put together an article on the effect of antipad dimensions
on energy transfer (by looking at s-parameters) and see some interesting
simulation results.

Thanks,
Karthik


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