[SI-LIST] Analyzing noise in chip packages

From: Doug Smith <doug@xxxxxxxxxx>
To: SI-List <si-list@xxxxxxxxxxxxx>
Date: Wed, 02 Apr 2003 19:31:52 -0800

Hi All,

This month's Technical Tidbit article I have just written deals with 
characterizing noise in chip packages and includes new information 
developed for this article.

Abstract: Voltage drops in chip packages can cause significant signal 
integrity and EMC problems. The good news is that in many cases these 
voltages can be measured through mutual inductance. Measured results 
and their interpretation are discussed.

The key here is interpretation of the scope waveforms. Two specific 
cases are studied in the article.

Page down the index page at http://emcesd.com to the picture of a 
probe on the surface of a chip and click on the picture.

Doug
-- 
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     ___          _       Doug Smith
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  /  /\  \ ] /  /\  \     Mobile:  408-858-4528
|  q-----( )  |  o  |    Email:   doug@xxxxxxxxxx
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[SI-LIST] Analyzing noise in chip packages

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