[SI-LIST] AW: PCIe Spacing between Tx or Rx Diff pair.
- From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- To: "Muhamed.Semic@xxxxxxxxxx" <Muhamed.Semic@xxxxxxxxxx>, "Sarada.Mohanty@xxxxxxx" <Sarada.Mohanty@xxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Fri, 22 Feb 2013 11:49:01 +0000
Muhammed, the tracewidth is already dependent on the stack up, multiples of
trace width are a very good rule of thumb.
Sarada,
For striplines 5x tw is usually no meaningful crosstalk. At 4x tw the coupling
is higher but still ok with PCIe in most cases.
For tighter coupling you would have to do simulations to find out if you meet
the performance.
BR
Gert
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-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
Auftrag von Muhamed Semic
Gesendet: Freitag, 22. Februar 2013 12:38
An: Sarada.Mohanty@xxxxxxx; si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Re: PCIe Spacing between Tx or Rx Diff pair.
It is all depends on the stack-up, diff. pair track/gap spacing and length they
run in parallel to each other on the layout.
Regards,
M. Semic
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Mohanty, Sarada
Sent: 22 February 2013 11:32
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCIe Spacing between Tx or Rx Diff pair.
Hi All,
Could anyone tell me what the spacing we need maintain between diff pairs(TX &
RX) for PCIe2 Gen 2.
As per below snapshot, it will be 4x the trace width .If my understanding is
wrong ,please correct me.
[cid:image002.jpg@01CE111E.4F804320]
Regards,
Sarada
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Other related posts:
- » [SI-LIST] AW: PCIe Spacing between Tx or Rx Diff pair. - Havermann, Gert
