[SI-LIST] AW: Manufacturing Issues

  • From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
  • To: si-list <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 8 Jan 2009 09:33:02 +0100

I've seen that tomb-stoning problem with 0402 components once.
It was caused by a huge soldermask-to-copper Layer offset in PCB production, 
due to this offset, there was soldermask on the pad. Since the offset was 
violating IPC spec, we've sent the whole batch back to the PCB vendor.
I've never seen this type of problems with quality PCBs.

 Mit freundlichen Grüßen / Kind regards.

Gert Havermann
Signal Integrity Engineer

>SI & CAE
>HARTING Electronics GmbH & Co. KG 
>Marienwerderstraße 3
>D-32339 Espelkamp 
>
>Phone +49 5772 47 857 
>Fax +49 5772 47 179
>mailto:gert.havermann@xxxxxxxxxxx
>http://www.HARTING.com
>



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Absender ist HARTING Electronics GmbH & Co. KG; Sitz der Gesellschaft: 
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-----Ursprüngliche Nachricht-----

Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im 
Auftrag von Thompson, Gary D (Gary)
Gesendet: Mittwoch, 7. Januar 2009 18:14
An: si-list
Betreff: [SI-LIST] Manufacturing Issues

Sorry for the somewhat off-topic nature of these questions. Hopefully someone 
here can steer me in the right direction.

I've recently receive a manufacturability review report from a top tier 
contract manufacturer, wherein they made some recommendations that I'm not too 
comfortable with. Part of me says "they're the experts," and I should accept 
their input. The other part wants to sanity check these suggestions just to 
make sure I'm not running down a single-source rat hole :^)

Suggestion 1
We're using more and more QFN type packages that have a thermal ground pad in 
the middle. Typically, we've just spaced vias in a grid on this pad down to 
internal ground layers. The CM says too much solder gets wicked down the vias 
leaving the pad too dry. They recommend we 1) move the vias to the outside 
edges of the pad and 2) cover them or dam them with soldermask to prevent 
solder from flowing that direction. Seems to me most manufacturer-recommended 
footprints I've seen do it the way we do, not the way the report recommended.

Suggestion 2
This report claimed soldermask between pads on 0603 and 0402 discretes left a 
bump between the pads that promoted tomb-stoning. They recommend removal of 
soldermask between these pads. I've never seen this done before, and the CM was 
not able to actually quantify the failure rates due to this soldermask. The 
last thing we want, though, is a solder bridge under an 0402 part...

Anybody else out there heard of this stuff or have recommendations on a more 
fitting place to ask these questions?

Thanks.


==============================================================
Gary Thompson                     Phone: (512) 821-6521
Systems/Applications Engineering  FAX: (512) 821-6810
LSI Corp.                         Mobile: (512) 751-8115
Network and Storage Products      Email: gary.thompson@xxxxxxx
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  • » [SI-LIST] AW: Manufacturing Issues - Havermann, Gert