[SI-LIST] AW: Low permittivity vs. High permittivity
- From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- To: "Jennifer Maharani" <jennifer.maharani@xxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Wed, 24 Jun 2009 08:50:40 +0200
Dear Jennifer,
the impedance, velocity of propagation and wavelength of the travelling wave
changes with the materials used:
v=c/SQR(dk)
wavelength=c/f*SQR(dk)
Z=Z0/SQR(dk)
That means, that the density of your circuit can be higher, the higher your
permitivity (dk) is. You can use smaller traces and less dielectric thickness
while having the same impedance, when switching to a higher dk.
If you choose to reduce the layer stack and use higher dk material to
kompensate for it, then you would also reduce the crosstalk between the traces
on the board, because the electric field will be more dense due to shorter
GND-plane distance.
BR
Gert
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-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
Auftrag von Jennifer Maharani
Gesendet: Mittwoch, 24. Juni 2009 07:55
An: si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Low permittivity vs. High permittivity
Dear all,
I understand that higher subtrate permittivity the more capacitive it is, which
means the more capacitive coupling will be introduced. This is obviously bad
particularly for structures like multi transmission line.
What is then the advantage of higher permittivity substrate like silicon over
lower permittivity substrate like glass?
Many thanks,
Jenni
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