[SI-LIST] AW: About layer stack up
- From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- To: "chundi srikanth" <chundis@xxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Thu, 25 Feb 2010 08:54:06 +0100
Hi Srikanth,
the split power planes 6 and 7 are critical for High speed signals on layer 5
and 8. It can work if you pay attention to the return current of all the
signals, but Murphey will be fighting against you.
I also recommend to use the bottom most layers (8 and 10) for the high speed
signals (via stubs).
routing diff pairs on the outer layers is possible, but has some drawbacks you
should consider:
- thru plating of the vias leaves an uneven copper weight, thus the trace
thickness varies much more than on inner layers. This affects the etching
tolerances and (depending on how tight you couple the traces) impedance.
- on outer layers you have a higher risk for radiation and externally induced
signal disturbance (many reasons, the most important is the missing GND shield).
just my two cent
BR
Gert
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-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
Auftrag von chundi srikanth
Gesendet: Mittwoch, 24. Februar 2010 19:21
An: si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] About layer stack up
Hi All,
Iam designing a 12-layer high-speed signal board. I have prepared a proposed
stack up for this board. Please see the stack up in the link
http://i406.photobucket.com/albums/pp147/srikanthchundi/12-layerstackup.jpg .
My query was Whether this stack up will work or any suggestions on this? And
moreover i want to know if differential signals can be routed in the bottom
layer( 12th layer) or do u se any problems with that? Please clarify.
Thanks & Regards
Srikanth
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