[SI-LIST] Re: ADC Gnd Noise

  • From: "Gupta, Deepali" <Deepali.Gupta@xxxxxxxxx>
  • To: <prajitsnair@xxxxxxxxx>, <kd_kamath@xxxxxxxxx>
  • Date: Wed, 11 Apr 2007 09:59:17 -0700

Hi Deepak ,

First thing which does glare out is the stack-up. For a 12 layer board
there are only two GND planes which will not be sufficient. The inner
layers have no GND planes for reference. Not sure on how the board is
routed but the sensor lines going to the ADC might just be getting noise
due to SI issues related to transmission lines and not due to noise on
the GND planes. So I think you should spend sometime time looking at the
routing of the actual sensor lines and the main clock lines and see what
kind of SI issues maybe occurring on the these transmission lines.

Second .....how did you measure the GND noise. I have seen that using
basic probes give an inherent noise of 60-70mV of noise. (meaning that
you see it but it is not actually there)=20

Regards,
Deepali


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of PRAJIT S NAIR
Sent: Tuesday, April 10, 2007 11:08 PM
To: kd_kamath@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ADC Gnd Noise

Hello Deepak..
I think it is difficult to comment on the board as you have only given
information on PCB layers and power connection.  Routing Information is
not
available.:

Did u check the ADC clock jitter?
Did u check the ground planes for analog, digital and clock signals.

 With Best Regards
Prajit S Nair


On 4/11/07, deepak kamath <kd_kamath@xxxxxxxxx> wrote:
>
> Hi,
>
>   I have designed a signal processing board to sample thermal sensor
data,
> process data and display images. The sensor has the sensitivity of
20mV and
> an ADC (Analog Devices, AD9240,14-bits) is used to sample the analog
signal
> from the sensor. ADC has 5 volt analog and digital supply with analog
and
> digital grounds. The sensitivity of the ADC is 0.3mV per bit and is
> configured for positive single ended mode of operation with input
dynamic
> range of 5 volts. The board also has FPGA and DSP which are used to
process
> the sensor signal. The clocks used are 100MHz to drive FPGA & DSP with
ADC
> operating at 10MHz.
>
>               The required power generation of 5 volts, 3.3 volts and
1.2volts are done using switching regulators and are mounted on a
separate
> board called power supply board. From power supply board power is
given to
> signal processing board. The received powers in signal processign
board are
> porperly filtered and converted into power planes of 5 volts, 3.3
volts
> and 1.2 volts. Similarly analog and digital grounds are etched out in
a
> single ground plane and are connected via ferrite bead.
>
>               The problem we are facing is a noise of  80mV(p-p) is
> observed on analog ground, digital ground, analog 5 vots supply and
digital
> 5 volts supply at the ADC pins. This noise is corrupting sensor
signal.
> ADC's LSB 6 bits are toggeling even when no signal is applied to ADC.
The
> signal processing board constitutes of 12 layers and following layer
stack
> is followed.
>   1.      Top signal layer
>   2.      Ground Plane layer
>   3.      Power plane layer
>   4.      Signal layer
>   5.      Signal layer
>   6.      Signal layer
>   7.      Signal layer
>   8.      Signal layer
>   9.      Signal layer
>   10.  Power layer
>   11.  Ground layer
>   12.  Bottom signal layer
>
>               Please suggest me ways to reduce ground and power noise.
>
>   Regards
>   Deepak
>
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