[SI-LIST] Re: ADC Gnd Noise

  • From: "Chris Padilla \(cpad\)" <cpad@xxxxxxxxx>
  • To: <Dave.instone@xxxxxxxxxx>, <kd_kamath@xxxxxxxxx>
  • Date: Thu, 12 Apr 2007 08:00:31 -0700

Dave brings up an excellent point:  Your scope leads can pick up noise
along the way if you aren't careful.  Even some of the 12.5 GHz diff
probes we have from Tek pick up noise as they get draped across our PCBs
and then finally to the scope.  I've had to switch to 10:1 or 20:1 "shop
probes" at times: tombstone a 450 or 950 ohm 0402 resistor (often, I'm
in a BGA field doing this) with a nice 50 ohm coax cable leading to the
scope.  That coax picks up a lot less board noise along the way.

Chris Padilla
Cisco Systems
San Jose, CA

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Dave Instone
Sent: Thursday, April 12, 2007 7:05 AM
To: kd_kamath@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ADC Gnd Noise

When you say AGND w.r.t AGND ect. where exactly are you measuring it? at
the ADC pins?  somewhere close to that?  how long are the leads that
connect scope live and ground?  All these will affect what you see on
the scope.  If you have one use a differential probe, if you haven't
tried one before for this type of measurement it will really open your
eyes to how far out a single ended probing method can be.  Has your
scope got an FFT capability or can you feed your probe output into a
spectrum analyser, this can really help in deciding where that 'noise'=20
is coming from.

Regards
Dave Instone
+44 (0)1235 824963

OXFORD SEMICONDUCTOR LIMITED
25 MILTON PARK
ABINGDON
OXFORDSHIRE
OX14 4SH
Registered in England no 2733820
Registered Address: As above=20



deepak kamath wrote:
> hi,
>    Thanks for the suggestion. We have measured analog ground noise
with respect to digital ground and it is around 300mV(p-p) on the scope.
Even if we subtract 60mV noise due to probe, the noise will be around
180mV(p-p). When there is no signal to ADC, the 8 LSB bits from ADC are
toggleing. That is, ADC is seeing around 80mV(p-p) noise at its input.=20
>   =20
>   The clock of 7.414MHz is generated using PLL inside the FPGA and is
passed through a 3.3V to 5V transceiver having driving capacity of 25mA.
The clock output from the transceiver is routed to ADC without any
sheilding. We are observing overshoots and undershoots of about 2V(p-p)
on the ADC clock, but there is no shift in the edges of the clock.=20
>   Yes, we have checked  both grounds and we are observing the noise of
around 300mV(p-p). That is, AGND w.r.t AGND has 300mV(p-p), DGND w.r.t
DGND has 300mV(p-p) and AGND w.r.t  DGND has 300mV(p-p).
>   =20
>   Thank you and regards,
>   Deepak.
>  =20
>  =20


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