Valid request. It looks to me that this will trigger some interesting DesignCon papers... :-) Lee Ritchey wrote: > I'd like to see actual measurements that show this degradation before I > sign up. > > > >> [Original Message] >> From: Istvan Novak <istvan.novak@xxxxxxx> >> To: <leeritchey@xxxxxxxxxxxxx> >> Cc: fei xue <harrison_cls@xxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx> >> Date: 5/13/2010 6:05:12 PM >> Subject: [SI-LIST] Re: AC series capacitor position in >> > highspeeddifferential signals > >> Lee, >> >> I agree with you that people should not blindly trust only simulation >> results. Those who follow my work >> know that for me a question answered means that measurements, >> simulations and understanding all have >> to agree to a sufficient degree. That having said I cant argue with >> your statement when you say that your >> measurements show negligible reflections in your boards: I trust it is >> true for the boards you built. >> >> What prompted my posting was that your original comment could be >> interpreted as a suggestion that >> the capacitor placement makes no difference under any circumstances as >> long as the channel is linear. >> My point was that there are situations (and we dont need to think about >> something exotic, just cases >> when pad discontinuity and/or via stub discontinuities are not removed >> for any reason) when the location >> of capacitor makes a difference in the received eye parameters by a >> noticeable way. With very typical >> parameters we can end up having 15-20% fluctuation of eye closure >> horizontally and vertically as we >> slide the capacitor along the channel. This can be simulated, but can >> also be measured on real system >> channels. >> >> Regards, >> >> Istvan Novak >> Oracle >> >> >> >> Lee Ritchey wrote: >> >>> I would maintain from my measurements that the reflections are >>> > negligibly > >>> small. >>> >>> I would also maintain that simulation results, no matter what the tool >>> > or > >>> operator, should not be trusted until they are validated by >>> > measurements to > >>> insure the modelling is accurate. I've seen too many simulations done >>> incorrectly which were used to develop design rules that were either >>> ineffective or caused problems that I, for one, will not use the >>> > results of > >>> unvalidated simulations. >>> >>> Each engineer can make up his or her own mind on this, but my experience >>> says validate simulation results before betting any money on them. >>> >>> I'm not trying to offend anyone who does simulations, just advising >>> > proceed > >>> with caution. >>> >>> Lee >>> >>> >>> >>> >>>> [Original Message] >>>> From: Istvan Novak <istvan.novak@xxxxxxx> >>>> To: Lee Ritchey <leeritchey@xxxxxxxxxxxxx> >>>> Cc: fei xue <harrison_cls@xxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx> >>>> Date: 5/12/2010 8:55:32 PM >>>> Subject: Re: [SI-LIST] Re: AC series capacitor position in high >>>> >>>> >>> speeddifferential signals >>> >>> >>>> Lee, >>>> >>>> As it was pointed out in earlier threads, location does make a >>>> difference unless reflections are >>>> negligibly small. Assuming linearity, when we move components around, >>>> reciprocity prevails, >>>> but voltage transfer function from source to load will change, which >>>> > in > >>>> turn impacts eye >>>> parameters. >>>> >>>> Regards, >>>> >>>> Istvan Novak >>>> Oracle-America >>>> >>>> >>>> Lee Ritchey wrote: >>>> >>>> >>>>> This has been answered before on this forum. Since the circuits are >>>>> linear, it does not matter from a signal integrity point of view. >>>>> >>>>> Lee >>>>> >>>>> >>>>> >>>>> >>>>> >>>>>> [Original Message] >>>>>> From: fei xue <harrison_cls@xxxxxxxxxxxx> >>>>>> To: <si-list@xxxxxxxxxxxxx> >>>>>> Date: 5/12/2010 11:35:49 AM >>>>>> Subject: [SI-LIST] AC series capacitor position in high speed >>>>>> >>>>>> >>>>>> >>>>> differential signals >>>>> >>>>> >>>>> >>>>>> Hello all, >>>>>> We often can get different guideline of placing capacitor position >>>>>> > when > >>>>>> >>>>>> >>>>>> >>>>> placing AC series capacitor on high speed differential signals, like >>>>> >>>>> >>> PCIe, >>> >>> >>>>> SAS or LVDS signals. sometimes we followed the guideline to put >>>>> >>>>> >>> capacitors >>> >>> >>>>> near driver, sometimes near multi-connection connectors or sometimes >>>>> >>>>> >>> put it >>> >>> >>>>> near receivers. >>>>> >>>>> >>>>> >>>>>> Could anybody tell me what is the consideration of capacitor placing >>>>>> >>>>>> >>>>>> >>>>> position? Thanks! >>>>> >>>>> >>>>> >>>>>> Harrison >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> >>> >>> >>> ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu