[SI-LIST] Re: AC Coupling bandwidth Consideration for 8b/10b

  • From: "Curt McNamara" <curt.mcnamara@xxxxxxxxxxx>
  • To: "Scott McMorrow" <scott@xxxxxxxxxxxxx>, <wolfgang.maichen@xxxxxxxxxxxx>
  • Date: Thu, 14 May 2009 13:58:30 -0500

Is this comment true for all types of dielectric?

In other words: does ESR decrease with increasing capacitance even if 
dielectric changes? 

Often the highest values of capacitance have the worst dielectric 
characteristics.

                                        Curt


Curt McNamara, P.E. // principal electrical engineer 
Logic Product Development
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-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Scott McMorrow
Sent: Thursday, May 14, 2009 12:57 PM
To: wolfgang.maichen@xxxxxxxxxxxx
Cc: Mike Harwood; si-list@xxxxxxxxxxxxx; si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: AC Coupling bandwidth Consideration for 8b/10b

I have to disagree slightly with you Wolfgang.  You are correct if you 
are talking about different capacitor body styles.  However, as long as 
the capacitor is housed in exactly the same package style (i.e. 0603, 
0402, 0201), the largest capacitance in a particular package from a 
manufacturer always has the lowest series resistance and inductance.  
There is a balancing act that needs to take place above 10 Gbps.  At low 
frequencies we are concerned with charging time constants, however, to 
faithfully pass the waveform edges through a capacitor it is necessary 
to design a minimum return loss transition.  This depends heavily on the 
location of the lowest plate in the capacitor.  That location can vary 
as much as 10 mils in the z-axis, which is significant when passing 
energy at 20-40 GHz.

-- 
Scott McMorrow
Teraspeed Consulting Group LLC
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Narragansett, RI 02882
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(401) 284-1840 Fax

http://www.teraspeed.com

Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC


wolfgang.maichen@xxxxxxxxxxxx wrote:
> - larger capacitors tend to have larger parasitics (inductance and 
> resistance), which degrades your signal fidelity.
>
> Wolfgang
>
>
>
>
>
>
>
> Mike Harwood <Mike@xxxxxxxxxxxxxx> 
> Sent by: si-list-bounce@xxxxxxxxxxxxx
> 05/14/2009 01:46 AM
>
> To
> si-list@xxxxxxxxxxxxx
> cc
>
> Subject
> [SI-LIST] Re: AC Coupling bandwidth Consideration for 8b/10b
>
>
>
>
>
>
>
> As well as the longest run length you need to pay attention to the 
> disparity in the number of 1's and 0's. For a 8b10b pattern of at least 
> 20 bits I believe that the disparity is never greater than 2 and the 
> greatest number of consecutive bits is 5. Generally 8b10b patterns are 
> reasonably well behaved in this regard and that's why people put up with 
> the 20% coding overhead.
>
> Rearranging V=V0 * e(-t/CR) for a 1% droop in 5 bits (5ns) gives 
> CR=497ns and equates to about 10nF in a 50 Ohm environment. I'd say that 
> 75nF gives a good degree of marging.
>
> Another interesting concept in choosing the DC coupling cap value is the 
> type of receiver used and the channel between TX & RX. Signals 
> tranmitted through long (say >18") of FR4 can take several tens of bits 
> to settle fully at 1Gb/s. This is a low pass effect easily determined by 
> examining the pulse response. If this effect is not corrected in the 
> receiver equalizer then some level of droop in the high pass filter is 
> desirable. I've seen performance  improvements in higher speed SerDes 
> with this correction.
>
> Mike.
>
>
> It's just a single pole HPF.  Calculate C based on the longest run 
> interval, the acceptable percentage droop and the line impedance.
>
> Steve.
> Neo wrote:
>
>   
>>> Hi,
>>>
>>> How we calculate the necessary HPF bandwidth for a say 1Gb/s 8b10b 
>>>       
> coded NRZ bit stream?
>   
>>> I think in some spec it is defined as 75nF and 50ohm. What's the 
>>>       
> theory behind this number? 
>   
>>> Thanks,
>>> Neoflash
>>>
>>>
>>>
>>>
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> -- Steve Weir Teraspeed Consulting Group LLC 121 North River Drive 
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