[SI-LIST] A question on : 100 ohm VS 85 ohm
- From: "Shao, Peng" <Peng_Shao@xxxxxxxxxx>
- To: "Ye, Chunfei" <chunfei.ye@xxxxxxxxx>, "Chris Padilla (cpad)" <cpad@xxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 21 Jun 2011 09:11:30 +0000
Hi, Chunfei,
I am honored to read your paper mentioned below: "Improve storage IO
performance by using 85Ohm package and motherboard routing", and I saw a very
pleasing conclusion: "Results show that 85Ohm package and motherboard routing
have better signal integrity performance than 100Ohm even if cable, connector,
hard disk driver and buffer, etc, are all designed at 100Ohm."
But there is one thing unclear left in this paper. What is the differential
trace structure for each of the 85Ohm and 100Ohm? You know that we can change
some different parameters, such as the trace width, the space between the P/N
traces and the distance to reference plane, to get the different impedance of
differential traces. So, I want to know under what kind of conditions you said
in paper "Generally speaking, the reasons for 85Ohm design over 100Ohm include
less loss, ease in routing (cost saving)". I think these conditions are
critical and meaningful for system design. Thanks for your time.
Shaopeng
AE Consultant Mentor Graphics Electronic Technology Co., Ltd.
Tel: +86-10 - 5930 4050
Cell: +86-136 1105 7707
Fax: +86-10-6808 0319
E-mail: peng_shao@xxxxxxxxxx
Address: RM1512, CanWay Building, No.66 NanLiShi Lu, Beijing, China 100045
-----邮件原件-----
发件人: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] 代表 Ye,
Chunfei
发送时间: 2011年6月18日 2:30
收件人: Chris Padilla (cpad); si-list@xxxxxxxxxxxxx
主题: [SI-LIST] Re: 100 ohm VS 85 ohm
Hi Chris,
Some of my colleagues at Intel and I are consistently driving for a 85ohm
interconnect for the past few years. Since I am responsible for server
high-speed IO signal integrity supporting USB/SATA/SAS and chipset package
design, I would like to share my experience and observations:
* 85Ohm seems to be with more challenges for SATA3 (6Gbps) and SAS2 (6Gbps)
because of the cables and connectors are 100Ohm in specification. Even in such
case, 85Ohm for package and board still has advantage.
* Designing connector and cable at 85Ohm will be very beneficial to further
improve SI performance.
* In the above observation, TX and RX termination is 100Ohm differential.
Under high volume manufacturing assumption
You may reference to my very recent publications for more detail if you have
interest:
"Improve storage IO performance by using 85Ohm package and motherboard
routing," Chunfei Ye Xiaoning Ye, Thanh Do-Nguyen, pp281 - 284, IEEE EPEPS
2010.
"Full Link Impedance Optimization for Serial IOs," Chunfei Ye, Xiaoning Ye,
Edgar J Vargas, Odilon Argueta, To be presented on IEEE EMC 2011
Both of the above papers talks about 85Ohm versus 100Ohm from cost and SI
performance perspectives, backed by simulation and measurement data.
Best regards
Chunfei Ye
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Chris Padilla (cpad)
Sent: Friday, June 17, 2011 10:08 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] 100 ohm VS 85 ohm
Folks,
I'm wondering if some of your higher speed designs are considering
moving to a < 100 ohm differential Zo?
We know that a 50 ohm via is difficult to make and the connector vendors
have equal trouble trying to reach 100 ohm differential on their high
speed connectors. Going to < 100 should make it easier to have lower
crosstalk and matched impedance to improve return loss, possibly better
signal to noise ratio, and wider traces could yield slightly lower loss
(depends on how you adjust the PCB geometries to reach 85 ohm, of
course).
A negative is the 50 ohm test equipment environment. One will have 42.5
ohm on their board. Can this be easily dealt with? Of course, most
chips are design with 100 ohm in mind so finding chips designed at
something else could be difficult.
I just wonder if the headache of moving off-standard is worth it or not.
I'm curious what the experience of folks here have witnessed.
Thanks,
Chris Padilla
Cisco Systems
San Jose, CA
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