[SI-LIST] Re: A question about reference plane in gigabit ethernet design!
- From: "Jack W.C. Lin" <JackWCLin@xxxxxxxxxxxx>
- To: "'Loyer, Jeff'" <jeff.loyer@xxxxxxxxx>,"Si-List (E-mail)" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 6 Oct 2003 09:43:04 +0800
Dear Jeff and Istvan:
Thanks for your reply and comments. yes, well understand about drawbacks of
image plane non-exist. I know that if I use co-planner design for
differential signaling, I also can control the impedance even without image
plane. Like most design in LAN card, the reference plane under differential
signal traces is empty after the magnetic module and some of them use
coplanner design to control the required impedance. """One of my question is
, if most return current back through the image plane in differential
signling, why some LAN chip vendors insist that differential signal should
reference to power due to center tap of capacitors for output magnetic
module are connected to power?""" Did they concern about the retrurn current
of common mode noise(signal)? power or ground reference should be equivalent
for high speed design, isn't it? ( of course, I know that some of bypass
capacitors should be used for return current continuity)
Thanks
Jack
-----Original Message-----
From: Loyer, Jeff [mailto:jeff.loyer@xxxxxxxxx]
Sent: Friday, October 03, 2003 10:27 PM
To: Jack W.C. Lin; Si-List (E-mail)
Subject: RE: [SI-LIST] A question about reference plane in gigabit ethernet
design!
Regarding the statement "Image plane is a return current path for high speed
single ended signal, but may not needed for differential signal pair because
most return current will return back through opposite polarity signal".
I would assert that, for typical PCB geometries, most return current does
NOT return through the opposite polarity signal. It returns through the
reference plane. Differential signals ARE more tolerant of reference plane
changes, but not because there isn't substantial current through those
planes. As has been described earlier in this forum, it's because the
respective return currents of the 2 differential halves cancel each other at
the reference plane boundaries.
But, if you removed the reference plane from a differential pair altogether
in a PCB (without compensating somehow), you would induce an enormous
impedance discontinuity.
Perhaps there are some signaling methods being used in PCB's which have
differential pairs not tightly coupled to reference planes, but I haven't
heard of them.
As Istvan said, a search through the archives should show significant
discussion about this.
Just didn't want a misnomer propagating...
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Jack W.C. Lin
Sent: Thursday, October 02, 2003 10:45 PM
To: Si-List (E-mail)
Subject: [SI-LIST] A question about reference plane in gigabit ethernet
design!
Dear All:
I have one question about Ethernet Design and hope someone who is familiar
with this field can provide your idea. For better impedance control in
differential signaling, we route differential signal traces over specified
reference plane, power or ground planes. Image plane (image plane) is a
return current path for high speed single ended signal, but may not needed
for differential signal pair because most return current will return back
through opposite polarity signal. In my belief, power or ground reference is
not a concern. But, I found different statements in different design
guideline for gigabit chip. one said that differential pair should be
reference to ground, the other said they should be reference to power plane.
The later statement has further explain, it said: center tap of transformer
will use the power which is the plane be referenced by differential pairs,
so return current can be withing on the power plane. I confused about this
statement!! The purpose of center tap is to remove unwanted common mode
noise on differential pairs. If the return current mean this common mode
current, I can understand. If it means others, I really don't know waht are
they? Sorry, let me organize my question as following:
(1)Why center tap capacitor pull up to power? not ground?
(2)If I provide power to transformer through trace, not plane; then I don't
need force differential pair
routed over power reference, right?
(3)Do we need really concern about return current on reference plane for
differential signal?
Reguads
Jack
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