Hello, We are designing a small 8L board with the following stackup: S/G/S/G/P/S/G/S (S = signal, P = power, G = ground) The most notable components are a few DDR2 (533) around an FPGA. If we use microvias on the layers 1-2, 2-3, 6-7,7-8, we can route most of the fast signals on the layers 1 and 3. With no microvias, we have to use all the layers. To keep the 50 Ohm tracks at a reasonable width, we use 100µm (4mils) dielectric thickness for the layers 1-2-3 and 6-7-8. Are we missing a better PCB stackup? Anybody tried something like G/S/S/G/P/S/S/G? Can you recommend a good PCB shop able to make a few prototypes (+-10) at a reasonable cost? (We have been given very high prices for this so far) Thanks, Marc ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu