Dear friends, I have a simple design and see if you guys can give me some advices. I am planning to run a parallel bus (8 data bit, few address lines, /CS, /OE, /WE, etc) on the back plane. The bus will go thru 6 loads in a daisy chain fashion (6 back plane connectors), and is asynchronous that can have read/write access time of few hundreds nano-seconds (access timing is programmable and can be quite relaxed). The total length of the bus would approximately be around 50" (including the traces on daughter cards). The driving buffer I am using is SN74ALVTH16244 which is a 32mA driver. Do I need some sort of termination on the bus to avoid ringing? What are the most important things that I should keep an eye on? Thanks Steve ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu