[SI-LIST] Re: 6 Layer Stack-up

  • From: "Nguyen, Mike" <Mike_Nguyen@xxxxxxxxxxxxxxxxx>
  • To: <Ravinder.Ajmani@xxxxxxxx>, <vishrampandit@xxxxxxxxxxx>
  • Date: Wed, 10 Sep 2003 13:28:58 -0700

Vishram,

Intel has a XFP Reference design kit (XEK66700) that use stack up #1.
XFP is a 10GbE type of signals which have 100ps rise time. Saying Stack
up #2
Is better than #1 at freq. >500Mhz, I do not quite agree.

Mike N.

-----Original Message-----
From: Ravinder.Ajmani@xxxxxxxx [mailto:Ravinder.Ajmani@xxxxxxxx]=20
Sent: Wednesday, September 10, 2003 12:54 PM
To: vishrampandit@xxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: 6 Layer Stack-up


Vishram,
I have mostly used the stackup no. 2 of your example.  I have also=20
compared the performance of identical design in stackup 1 and 2, and
found=20
out that for frequencies over 500 MHz, stackup 2 is superior.  With the=20
present day sub-nano second edge rates, it is very easy to have even 50=20
MHz clock harmonics well up to a GHz or more.
However, there are following issues in using stackup no. 2:
1)  In order to get the benefit of buried capacitance, the spacing
between=20
Power and Ground should be 4 mils or less.  If you can afford it, go for

ZBC-2000, which is a 2 mil core patented by Zycon.=20
2) The signals on adjacent layers (1 & 2, and 5 & 6) need to be
carefully=20
routed so that there is no overlapping of traces.
3) Impedance matching will be difficult for the traces that move between

outer and inner layer (traces on outer layer have to be much wider than=20
traces on inner layer).  Hence, try to route most of the signals on the=20
inner layers, and preferably against the Ground plane as reference.
After experimenting with both types of stackup, I have settled on the=20
stackup 2.  Even from EMI perspective, I have seen lower emissions with=20
this stackup if the signal impedance is matched properly with
transmission=20
line design and terminations.=20
Regards, Ravinder
Server PCB and Flex Development
Hitachi Global Storage Technologies

Email: Ravinder.Ajmani@xxxxxxxx






"Vishram Pandit" <vishrampandit@xxxxxxxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
09/10/2003 11:14 AM
Please respond to vishrampandit

=20
        To:     larry.smith@xxxxxxx
        cc:     si-list@xxxxxxxxxxxxx
        From:   si-list-bounce@xxxxxxxxxxxxx
        Subject:        [SI-LIST] 6 Layer Stack-up




=20




We have been using the stackup S-G-S-S-P-S.(stack up no. 1). Now, with
suggestion from SI-List, on newer high speed designs, I would like to
use=20
G
adjacent to P with 4-6 mils of separation. It will give me very good
decoupling. However, I have only 6 layers so I have to have my stack-up
as S-S-G-P-S-S (stack up no. 2). Will it be okay?=20

Here are pros and cons as per my analysis:=20

1] Stack up no. 1 gives you poor P/G decoupling, wheras stack up no. 2=20
gives
you very good P/G decoupling.=20

2] P/G Decoupling caps at higher frequencies (>500MHz) are not required=20
for
stack up no. 2=20

3]Stack up no. 1 will shield the EMI radiation from internal traces=20
because
of G(Layer 2) and P(Layer 5).we will loose this benefit for the stack up

no.
2.=20

4] For stack up no. 1, signals on Layer 1, 3, 4, and 6 had a reference
plane.For stack up no. 2, only signals on Layer 2 and 5 have reference
planes. So I have to be careful routing high speed signals on Layer 1
and Layer 6.=20

Has anyone implemented stack up no. 2 on 6 layer board? Which stack up
is advisible for 6 layer board? What are pros and cons for stack up no.
1 and=20
2
for a 6 layer board?


Thanks,=20

Vishram


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