[SI-LIST] 10-Layer Stackup possibility in 1mm thickness Board
- From: "Embedded" <hw_si@xxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: 25 Sep 2009 19:17:10 -0000
Dear Experts,
In our design we are using 400-pin 0.5mm BGA and board size is 66mm x 40mm and
the board thickness is 1 mm (Standard form factor).
We are planing to go with 10-layer stackup. We can use blind via from L1 to L2.
Considering the PCB Fab cost the blind via from L1 to L3 is not allowed in our
design. So we are planning to go withe below stackup.
Stackup
--------
L1 --- Top (Signal/ Component)
L2 --- Signal
L3 --- Plane (GND)
L4 --- Signal
L5 --- Plane (VCC1)
L6 --- Plane (GND)
L7 --- Signal
L8 --- Plane (VCC2)
L9 --- Signal
L10 --- Bottom (Signal / Component)
In this stackup, to meet single-ended 50 ohm impedance requirement the minimum
trace width is given 3 mils in Layer L4 and L7.
Our PCB fabricator says that Using 3/3 all over the board is going to be more
expensive.It will create yield issues.It could increase the cost 15-20%
depending on yields.
So we would like to know that 10-layer stackup is practically recommended for 1
mm thickness board?
Thanks in Advance.
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