[SI-LIST] Re: 0306 Capacitors
- From: "Istvan NOVAK" <istvan.novak@xxxxxxxxxxxxxxxx>
- To: <weirsp@xxxxxxxxxx>
- Date: Fri, 12 Mar 2004 09:06:10 -0500
Steve,
See comments below. (A big part of the past thread has been cut out.)
Regards,
Istvan
> >
> >BTW: the via pattern on the test board for reverse geometry capacitors
> >is two rows of vias OUTSIDE of the pads. Intuitively one can assume
> >that some other via patterns would yield lower inductance.
>
> Intuitively maybe, but realizing the pattern is no easy trick. The
> distance from pad edge to pad edge for the 0612 reverse geometry is
> 0.025". There is no way I know of to put two rows of vias in that
> space. If I go to a 0.020" hole with a 0.010" via, the best I could hope
> to do is get one of the via rows inside the pad. If you know of vias with
> a 0.010" OD maybe things would change.
I agree that it may not bne easy, but today aspect ratios above ten become
cheap enough to use them on low-cost boards. Also, if you move just one
row of vias in between the pads, it already reduces the inductance. In
addition, there is a possibility to put vias (two at least) very close at
the end
of the pads.
> >
> >What you say here may be true, however, you are deriving inductance
values
> >from transfer impedance values. The plane inductance due to the large
> >separation is 'easy' to modify by the capacitor's impedance. Plus, the
> >parts which have muiltiple connections to the planes, have connections
> >along the path you measure the transfer impedance. Larger devices
> >bridge a larger portion of the path. So while the statement appear to be
> >true and correct, I see a need for further proof.
>
> As I pointed out above, transfer impedance is exactly what we want,
because
> that is what we face in a real board. Raw device characterization is a
> separate issue. You say that because the board impedance is high that it
> is easy to modify with the capacitor impedance. Well, of course that is
> true, but I fail to see where it bears anywhere on the accuracy of the
> tests. It would only matter if changing the area of the board had a
marked
> effect on the attachment inductance of the capacitor. I am not aware of
> any physics that could support such a conclusion.
I agree that transfer impedance is important, but self impedance still
cannot
be ignored in some applications. As it was pointed out earlier on similar
threads, some applications require capacitors near and around devices to
provide a given inductance to the device.
>
> Let's suppose that we build a 12" X 12" board instead of the 1.2" X 1.2"
> fixture used. The much lower impedance of the board would make it much
> more difficult to see the behavior of a single capacitor. However, if
> since we scaled the board by 100X area, we place 100 capacitors instead of
> one, essentially one capacitor for each of the 1.2" X 1.2" cells
reproduced
> in the 12" by 12" board, I submit that all behavior will remain identical
> up until we approach the anti-resonance of the discretes to the planes,
> which will now be down around 150MHz, instead of well above 1GHz. We
would
> have a 2 milliohm system out to 100MHz instead of a 200 milliohm system.
>
> If you would like raw part data obtained from microstrip fixtures, both
X2Y
> and their licensee manufacturers have this. An X2Y 0603 routinely and
> repeatedly measures 120pH raw, just as AVX reports for the 0612 IDC. To
> get under those values, one has to go to the 0508 IDC, 95pH or to a larger
> X2Y. The "king of the mountain" in X2Y is the 1210 at a measured
> inductance of 50pH. My results match results obtained independently by
> Yageo. In raw inductance numbers, the only games in town are X2Y or
> IDC. Unfortunately, IDC is comparatively very expensive. If AVX would
> drop the price of IDCs to a nickel, they would be very compelling parts.
>
> We tested multiple locations to precisely to verify that there is no
> location dependency such as you suggest. That data is shown in the
report,
> where only the slightest variation in ESR was observed by moving from a
> center edge location to a corner position in the test area.
There has been no disagreement here.
> If you wish to suggest an alternative test methodology, I am happy to
model
> against it, and more than likely X2Y would likely execute it to get
> everyone on the same page.
First I would like to fully understand the present test board. Have you
done
reference measurements with the capacitor pads shorted?
> Regards,
>
> Steve
> > >
> > > Regards,
> > >
> > >
> > > Steve
>
>
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