[raspi-internals] Re: QPU Tutorials/Samples

  • From: Herman Hermitage <hermanhermitage@xxxxxxxxxxx>
  • To: "raspi-internals@xxxxxxxxxxxxx" <raspi-internals@xxxxxxxxxxxxx>
  • Date: Sun, 16 Feb 2014 12:05:34 +1200

>> bra with return address:
>> The original file contains the line:
>> brr rb4, after_write_qpu_1_7 #// 0x00000268 #/* 00000210: 00000038
>> f0f81127 */
>> However, the description of branches in
>> https://github.com/hermanhermitage/videocoreiv-qpu is
>>
>>
>>
>> addr:32, 1111 0000 cond:4 relative:1 register:1 ra:5 X:1 wa:6 wb:6
> ...
> Now I've confused myself...  I would have thought the branch instructions 
> should be using the add alu for the target address calculation and the mul 
> alu to mov the pc to link register.  That would mean wa is used to capture 
> the target address and wb to capture the return address.  But we are seeing 
> wa used to capture return address.

I tried a test:
    /* 0x00000010: */ 0x00000020, 0xf0f80000, /* brr ra0, rb0, write_vpm */
    -> ra0 and rb0 both have return/link address.

If I do:
    /* 0x00000030: */ 0x00000020, 0xf0f80040, /* brr ra1, rb0, write_vpm */
   -> ra1 and rb0 both have return/link address

If I do:
    /* 0x00000030: */ 0x00000020, 0xf0f81040, /* brr rb1, ra0, write_vpm */
   -> rb1 and ra0 both have return/link address

So either or both wa (bank a), wb (bank b) can catch the link address, and the 
X bit swaps the banks to wa (bank b), wb (bank a).                              
           

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