[raspi-internals] Re: GPU FFT Disassembly

  • From: Herman Hermitage <hermanhermitage@xxxxxxxxxxx>
  • To: "raspi-internals@xxxxxxxxxxxxx" <raspi-internals@xxxxxxxxxxxxx>
  • Date: Mon, 3 Feb 2014 18:49:23 +1200

Further to Scott's comments, I'd consider the disassembly of instructions of 
the form xxxxxxxx dxxxxxxx dubious.

Instructions of this form have a small immediate value encoded in them but they 
arent so common in the GLES generated shaders, so I have had a limited set of 
sequences to test them with.


eg.

> /* 000005b8: 14988dc0 d00229e7 */  and.setf -, elem_num, 8; nop
(this looks ok)

But these do not:

> /* 000005c0: 959f8492 d002c3a2 */  mov ra14, r2; mov.zc r2, r2
...
> /* 000005d8: 959f4492 d002c362 */  mov ra13, r2; mov.zc r2, r2

Looking at these bits in more detail, I have:


/* 000005c0: 959f8492 d002c3a2 */ mov ra14, r2; mov.zc r2, r2

  mulop=4, addop=21, ra=39, rb=56, adda=2, addb=2, mula=2, mulb=2, 
  op=13, unpacking=0, packmul=0, packing=0, addcc=1, mulcc=3, F=0, X=0, wa=14, 
wb=34


/* 000005d8: 959f4492 d002c362 */ mov ra13, r2; mov.zc r2, r2

  mulop=4, addop=21, ra=39, rb=52, adda=2, addb=2, mula=2, mulb=2,
  op=13, unpacking=0, packmul=0, packing=0, addcc=1, mulcc=3, F=0, X=0, wa=13, 
wb=34  

The anomaly is rb = 56 and rb = 52.

Given both instructions have addb=2, which implies use accumulator r2, instead 
of register rb56 (or rb52)

I'm going to guess that these are actually uses of the rotator through the SIMD 
units.

It looks like I need to dig more into the OpenVG rasterizers as they use a 
broader range of instructions which should elucidate more of these addressing 
modes.

That said now there is an execute API it should be easier to implement tests.   
                                  

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