Here is the link to tonight's talk.
https://gitlab.com/phx-comp-eng/simulating-digital-circuits-with-verilator
Let's plan to meet in 3 or 4 weeks. I will start working on the next
session's talk over the next few days. We will get further into boolean
algebra and introduce state machines, and then start working on storage
elements (flip flops and registers).
For those who couldn't attend, if you view the presentation and have any
questions, feel free to raise them.
Fritz
On 6/18/19 7:15 AM, Fritz Mahnke wrote:
Reminder that the meeting is today at 6pm. We're in Study Room 7. If
you walk into the front entrance of the library, it's straight back
to the other end of the building and to the right.
See you tonight!
Fritz
On 6/12/19 1:13 PM, fritz@xxxxxxxxxxx wrote:
Ok, I reserved Study Room 7 at the Tempe library for Tuesday 6/18
from 6pm-8pm. I know we'd talked about aiming for 6:30 meeting
time, but this is what I was able to make work with the library's
system. I hope this time will work for everyone, and if it's an
issue we can adjust going forward.
Can we get a head count with email responses on this thread for who
can and can't attend?
I'm planning to do a talk on simulating some logic circuits using Verilator and evaluating the signal results in GTKWave.
I will go down to the library tomorrow evening and check out the
room and make sure the monitor works.
Thanks, Fritz
