You'll make me feel like an old man now. With Legacy iron, everyone accept Sequent, threw HW interrupts out on the single bus. Sequent SMPs (Symmetry) has a secondary bus for the sole purpose of distributing interrupts... so other systems had what we always called pregnant CPUs, because they were the unlucky ones that always snacked up the interrupts...and if you were some poor Oracle shadow process with affinity to that CPU, uh, well, let's just say that you get an unfair amount of starvation...and oh my the chaos that ensues when processes held latches on the "pregnant CPUs". The was why Sequent stomped all other SMPs. Other vendors' benchmarking folks would have to go in there and set hard affinity of Oracle processes to higher order CPUs so that this sort of pathology wouldn't occur. Those where not exactly Symmetric Multiprocessors now, where they? Nowdays? APIC my friend, APIC...oh, and, aaargh, there are mitigating efforts like intrd (not initrd) on Sol, etc ... >>>-----Original Message----- >>>From: oracle-l-bounce@xxxxxxxxxxxxx >>>[mailto:oracle-l-bounce@xxxxxxxxxxxxx] On Behalf Of Tanel Põder >>>Sent: Thursday, January 19, 2006 4:17 PM >>>To: ORACLE-L >>>Subject: Re: CPU count vs. CPU clock speed >>> >>>> Having more CPUs means more CPUs to handle interrupts, but >>>that is not >>>> always a gian either since the interrupt context often goes cache >>>> cold... >>> >>>Cool stuff :) >>>That leads to the question, how are hardware-initiated >>>interrupts dispatched to CPUs? E.g. are IO controllers bound >>>to specific CPUs, or is there some round-robin mechanism? >>> >>>Tanel. >>> >>>-- >>>//www.freelists.org/webpage/oracle-l >>> >>> >>> -- //www.freelists.org/webpage/oracle-l