[linux-unicore] 答复: [linux-unicore] [RFC binutils/opcodes 1/3] Unicore32 Registers ,opcodes fields tables, structure for instruction.

  • From: "Guan Xuetao" <gxt@xxxxxxxxxxxxxxx>
  • To: <linux-unicore@xxxxxxxxxxxxx>
  • Date: Fri, 28 Dec 2012 09:28:18 +0800


> -----邮件原件-----
> 发件人: linux-unicore-bounce@xxxxxxxxxxxxx
> [mailto:linux-unicore-bounce@xxxxxxxxxxxxx] 代表 LIU Zhiyou
> 发送时间: Tuesday, December 25, 2012 23:56
> 收件人: linux-unicore@xxxxxxxxxxxxx
> 抄送: LIU Zhiyou
> 主题: [linux-unicore] [RFC binutils/opcodes 1/3] Unicore32 Registers
,opcodes
> fields tables, structure for instruction.
> 
> Registers table are straightforward.
> 
> Opcodes fields declare all the fields' width and offset(shift) with a X
macro. Some
> fields sharing same width and offset(shift) is because they are used in
different
> instruction and have different meanings.
> 
> Instruction are representing by a simple structure which only contains
data
> fields and its behavior is defined by function in its `type' field. By
doing that, we
> can disassemble and assemble in a data/function-driven style.
> 
> Signed-off-by: LIU Zhiyou <liuzhiyou.cs@xxxxxxxxx>
> ---
>  include/opcode/unicore32.h | 178
> +++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 178 insertions(+)
>  create mode 100644 include/opcode/unicore32.h
> 
> diff --git a/include/opcode/unicore32.h b/include/opcode/unicore32.h new
file
> mode 100644 index 0000000..8fc0d48
> --- /dev/null
> +++ b/include/opcode/unicore32.h
> @@ -0,0 +1,178 @@
> +/* unicore32.h -- Header file for UniCore32 opcode and register tables.
> +   Copyright 2007, 2008, 2010 Free Software Foundation, Inc.
The copyright information could be 2012.

> +   Contributed by LIU Zhiyou
> +
> +   This file is part of GAS, GDB and the GNU binutils.
> +
> +   GAS, GDB, and GNU binutils is free software; you can redistribute it
> +   and/or modify it under the terms of the GNU General Public License as
> +   published by the Free Software Foundation; either version 3, or (at
your
> +   option) any later version.
> +
> +   GAS, GDB, and GNU binutils are distributed in the hope that they will
be
> +   useful, but WITHOUT ANY WARRANTY; without even the implied warranty
> of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +   GNU General Public License for more details.
> +
> +   You should have received a copy of the GNU General Public License
> +   along with this program; if not, write to the Free Software
Foundation,
> +   Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
> + */
> +
> +#ifndef _UNICORE32_H_
> +#define _UNICORE32_H
A typo.

> +
> +
> +typedef enum
> +{
> +    /* all general purpose registers in UniCore32 */
> +    r0, r1, r2, r3,
> +    r4, r5, r6, r7,
> +    r8, r9, r10, r11,
> +    r12, r13, r14, r15,
> +    r16, r17, r18, r19,
> +    r20, r21, r22, r23,
> +    r24, r25, r26, r27,
> +    r28, r29, r30, r31,
> +    MAX_GPREG,
> +    /* UniCore32 processor registers and special registers : */
> +    apreg, /* just a stub */
> +    MAX_PREG,
> +    /* Unicore32 coprocessor registers */
> +    acoreg, /* just a stub */
> +    MAX_COREG,
> +    /* Not a register.  */
> +    nullregister,
> +    MAX_REG
> +} regs;
> +
> +/* util macros of enum reg */
> +#define first_gpreg r0
> +#define first_preg apreg
> +#define first_coreg acoreg
> +#define is_gpreg(x) ((x) >= first_gpreg && (x) < MAX_GPREG) #define
> +is_preg(x) ((x) >= first_preg && (x) < MAX_PREG) #define is_coreg(x)
> +((x) >= first_coreg && (x) < MAX_COREG)
> +
> +
> +
> +/* Macro for binary literal support */
> +/* Helper macros */
> +#define HEX__(n) 0x##n##LU
> +#define B8__(x) ((x&0x0000000FLU)?1:0) \
> ++((x&0x000000F0LU)?2:0) \
> ++((x&0x00000F00LU)?4:0) \
> ++((x&0x0000F000LU)?8:0) \
> ++((x&0x000F0000LU)?16:0) \
> ++((x&0x00F00000LU)?32:0) \
> ++((x&0x0F000000LU)?64:0) \
> ++((x&0xF0000000LU)?128:0)

Is there a common header to avoid above replicated codes?

> +
> +/* User macros */
> +#define B8(d) ((unsigned char)B8__(HEX__(d))) #define B16(dmsb,dlsb)
> +(((unsigned short)B8(dmsb)<<8) \
> ++ B8(dlsb))
> +#define B32(dmsb,db2,db3,dlsb) (((unsigned long)B8(dmsb)<<24) \
> ++ ((unsigned long)B8(db2)<<16) \
> ++ ((unsigned long)B8(db3)<<8) \
> ++ B8(dlsb))
> +
> +#define InstField_DEF \
> +    InstF(InstField_Opcodes, 4, 25)        \
> +    InstF(InstField_S, 1, 24)                  \
> +    InstF(InstField_Rn, 5, 19)                    \
> +    InstF(InstField_Rd, 5, 14)                       \
> +    InstF(InstField_ShiftImm, 5, 9)                    \
> +    InstF(InstField_Shift, 2, 6)                       \
> +    InstF(InstField_Rm, 5, 0)                          \
> +    InstF(InstField_Rs, 5, 9)                            \
> +    InstF(InstField_N, 1, 26)                            \
> +    InstF(InstField_Cond, 4, 19)                  \
> +    InstF(InstField_R, 1, 26)                    \
> +    InstF(InstField_A, 1, 25)                       \
> +    InstF(InstField_S, 1, 24)                    \
> +    InstF(InstField_U, 1, 26)                            \
> +    InstF(InstField_RdLo, 5,14)                       \
> +    InstF(InstField_RdHi, 5, 9)                          \
> +    InstF(InstField_Z, 1, 26)                            \
> +    InstF(InstField_Rotate, 5, 9)                          \
> +    InstF(InstField_Imm9, 9, 0)                          \
> +    InstF(InstField_B, 1, 26)                            \
> +    InstF(InstField_P, 1, 28)                            \
> +    InstF(InstField_W, 1, 25)                            \
> +    InstF(InstField_L, 1, 24)                            \
> +    InstF(InstField_Imm14, 14, 0)                          \
> +    InstF(InstField_hRlist, 10, 9)                            \
> +    InstF(InstField_lRlist, 6, 0)                            \
> +    InstF(InstField_H, 1, 6)                            \
> +    InstF(InstField_hOff10, 5, 9)                            \
> +    InstF(InstField_lOff10, 5, 0)                            \
> +    InstF(InstField_hX, 20, 9)                          \
> +    InstF(InstField_lX, 0, 8)                            \
> +    InstF(InstField_sOff24, 24, 0)                            \
> +    InstF(InstField_CRd, 5, 14)                            \
> +    InstF(InstField_Cp_num, 5, 9)                            \
> +    InstF(InstField_Off10, 10, 0)                            \
> +    InstF(InstField_8Rlist, 8, 0)                           \
> +    InstF(InstField_DPOp1, 4, 24)                            \
> +    InstF(InstField_CRn, 5, 19)                            \
> +    InstF(InstField_Op2, 4, 6)                             \
> +    InstF(InstField_CRm, 5, 0)                           \
> +    InstF(InstField_RTOp1, 3, 25)                            \
> +    InstF(InstField_STnum, 24, 0)
> +
> +typedef enum {
> +#define InstF(name, width, offset) name, InstField_DEF #undef InstF }
> +inst_fields;
> +
> +#define InstF(name, width, offset)    \#define name##_Mask ((1 << width)
- 1)
> << offset
> +InstField_DEF
> +#undef InstF
> +
> +extern short inst_width[];
> +extern short inst_offset[];
> +
> +#define MAX_ARG 4
> +
> +struct inst;
> +typedef struct {
> +    void (*init)(inst *, argument*);
> +    /* field1 and field2 are in fact init's argument, */
> +    inst_fields field1, field2;
> +    void (*print_arg)(isnt *, argument *, struct disassemble_info *);
> +
> +} argument_type;
> +
> +typedef struct {
> +    union {
> +        reg areg;
> +        unsigned long uimm;
> +        unsigned long raw;
> +    } ucontent;
> +    long scontent;
> +    argument_type* type;
> +} argument;
> +
> +
> +typedef struct {
> +    char *prefix;
> +    /***
> +     * (inst.raw & mask) == expect should be true
> +     * if and only if inst is belong to such inst_type;
> +     ***/
> +    unsigned long mask;
> +    unsigned long expect;
> +    void (*print)(isnt *, struct disassemble_info *);
> +    argument_type args[MAX_ARG];
> +} inst_type;
> +
> +typedef struct {
> +    unsigned long raw;
> +    const inst_type  *type;
> +    argument args[MAX_ARG];
> +} inst;
> +
> +extern inst_type inst_types[];
> +
> +#endif
> --
> 1.8.0.2



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  • » [linux-unicore] 答复: [linux-unicore] [RFC binutils/opcodes 1/3] Unicore32 Registers ,opcodes fields tables, structure for instruction. - Guan Xuetao