Hi,
Let me restate my problem.
I have 2 modules module1 and module2 in 2 different directories.
I have individual makefiles for both of them.
If I run the make in those individual directories.I am able to see it making
the targets only upon change in dependencies of those targets.Off course it is
the desired behaviour.
But when I call Makefile of module2 from the Makefile of module1 like,
module1: module2
gcc -o module1 module1.c
module2:
cd dll && $(MAKE)
It makes module1 everytime but not module2(as there is no change in its
dependents) even though there is no change in the dependency list of both
module's targets.
with regards
kamesh jayachandran
