[PCB_FORUM] Re: same net rules

  • From: J-Charles TEYSSIER <jcteyssier@xxxxxxxxxxxxxxx>
  • To: icu-pcb-forum@xxxxxxxxxxxxx
  • Date: Mon, 22 Jan 2007 13:16:53 +0100

It's a feature that check only solder mask between pins and vias . It is located in constraint manager in "Design constraints" field.
But it dos not check entities manually added on package_geometry/soldermask and the property nodrc_sym_same_pin is not usable with.
Not a great feature according to me, it have to be improved...

Jean-Charles

gnieski_mike@xxxxxxx a écrit :
	Just reading this email and also have never seen this rule
before.
	What is the function of the soldermask alignment drc? 

	Mike 

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of westfeldt
Sent: Saturday, January 20, 2007 7:18 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: same net rules

Thank you Robert.  I can't believe I have never seen that one in there.
Using "sm to sm" works for via to smd.  Also a pleasant surprise, this
does
not give me drc's where I allow a soldermask shape to cover over pads
that
already have soldermasks.  I'm guessing this rule will show up with
occasional bogus drc's, but nowhere near as bad as if I pushed the same
net
button. 

Patrick

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Robert
Szumowicz
Sent: Tuesday, January 09, 2007 1:10 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: same net rules

Patrick,
I think it is available even in a lower tool than Performance:
setup-> constrains->design constrains->soldermask to soldermask

Dave,
they do if same net DRC is switched on, but:
 - I cannot assign different values for 'same net' and 'different net'
 - I see occasionally unwanted and annoying DRCs 'Line to Line Spacing' 
when clines overlaps (intentionally)

Robert


westfeldt wrote:
  
Soldermask to soldermask might work, but I don't know how to set it, 
is that available in Performance option?

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Robert 
Szumowicz
Sent: Friday, January 19, 2007 8:24 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: same net rules

Hi all,

I think I do understand the question since I also miss such feature.

Problem stated:
 - to not to have Via too close to SMD pin

Partial Solution:
 - enable same net DRC (problem is that it checks all other rules and 
often creates many unwanted DRCs)

Other possibility
 - set a rule for "Solder mask to Solder mask" spacing assuming that 
Vias are not covered (problem is that this is one global rule for a 
whole design)

regards,
Robert


Macindoe, Gary wrote:
  
    
Hey Pat,

Not exactly sure what you are asking here.  Need a little
      
clarification!
  
 
Gary E. MacIndoe
Advanced Micro Devices
PCB Design Engineer
Longmont, Colorado

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of westfeldt
Sent: Friday, January 19, 2007 6:43 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] same net rules

Is there no way in Allegro to have the same net rules apply only to 
certain rules?  The one I always need is via to smd pin, but I would 
not want all the rest of the rules to have same net application.

Patrick Westfeldt, Jr.
North Boulder Circuit Design
westfeldt_nbcd@xxxxxxxxx
720-406-0887
c 720-272-5822


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