[PCB_FORUM] Re: PWB Design issue.

  • From: "Schwartz, Jerome" <jschwa01@xxxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Tue, 10 Apr 2007 15:22:10 -0400

 Mitch,

        There are a number of sanding operations done as multiple
plating operations
are done. The spec indicates how much copper needs to be left after all
processing
is complete.


Jerry


-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mitch S. Morey
Sent: Tuesday, April 10, 2007 3:18 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: PWB Design issue.

Thanks Jerry, but what exactly does the filled hole plating have to do
with copper spacing? (e.g. "Due to the panelizing process, designs
requiring a space of 4 mils or smaller can not be built to this spec.")

Does it mean that if the wrap-plating requirement has increased (e.g the
BGA pad to trace running between BGA pads) then I can no longer go
.003"-.004" spacing between my BGA pads based on my ball pitch? That's
what I'm thinking. Is that right? If it is the case, either I waive the
requirement or decrease the pad sizes or simply NOT run routes between
the
pads.

Still a little fuzzy to me.
Mitch
>
> The spec has changed for wrap around copper for blind vias.
> The old spec said that .0002 minimum thickness is required for the
> continuous
> surface plate to the inside of the plated filled hole.
> Jerry
> -----Original Message-----
> From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
>
> Hi all,
>
> I recently had this response from my fabrication house, and was
> wondering
> if anyone else has run into this issue. I'm still trying to figure out
> exactly what it means (e.g. costs me).
>
> ----------------------------
> Due to blind vias/epoxy fill requirement & spacing on the outer
layers,
> a
> new copper wrap plating process cannot be achieved per IPC 6012B due
to
> spacing issues. I would like to verify if we can wave this process
since
> you have less than 4 mils space on your data. Please see below.
>
> In mid January of 2007, IPC released Amendment 1 of 6012B, updating
it's
> copper wrap plating spec (3.6.2.11.1) that reads as follows:
>
> Copper wrap plating minimum as specified in Table 3-2 shall be
> continuous
> from the filled plated hole onto the external surface of any plated
> structure and extend by a minimum of 25 um (984uin) where an annular
> ring
> is required.  Reduction of wrap-plating by processing (sanding,
etching,
> planerization, etc.) resulting in insufficient wrap plating is not
> allowed.
> XXX1 is committed to manufacturing your PCB's to the highest
standards.
> Due to the panelizing process, designs requiring a space of 4 mils or
> smaller can not be built to this spec.
> ----------------------------



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