[PCB_FORUM] Re: Oddball FET Footprint

  • From: "Moris Ruso" <moris@xxxxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Tue, 26 Jun 2012 09:04:43 +0300

Hi , 
just wanted to reply but I see writing is not enough to describe.
Please find attached my symbol. As soon as you load the netlist assign the 
shape to connect the pads.
That's how we use it.
I hope it helps.

Best Regards,

Moris Ruso , Circuit Designer
Miga-Cad PCB Design Ltd.
Land: +972-4-959-1959 
e-mail: moris@xxxxxxxxxxx
visit us at http://www.migacad.com
 P Think Green | Only print as needed. 

From: Ritter, Alan 
Sent: Monday, June 25, 2012 7:14 PM
To: icu-pcb-forum@xxxxxxxxxxxxx 
Subject: [PCB_FORUM] Oddball FET Footprint

I'm working on the PCB footprint for a Siliconix (Vishay) Si7308DN FET.  
Nominally, it's an 8-pin part, but the thermal pad partially overlays pins 5-8 
(the drain connections to the FET).  The recommended layout has the 8 
individual pins plus the thermal pad.  Obviously, adding this as a ninth pad or 
a filled shape creates DRCs with pins 5-8.


Anyone have any bright ideas for how to lay this beast out to avoid DRCs and 
keep with the recommended pad configuration for the part?


Alan Ritter

Surgical Equipment Design & Development

Engineering Fellow


(636) 226-3364 (Office)

(636) 226-3552 (FAX)

(314) 488-1139 (Mobile)

Bausch + Lomb

3365 Treecourt Ind. Blvd.

St. Louis, MO  63122



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