[PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro Design Entry HDL...

1. Start the Project Manager and open your project.
2. Start Design Entry
    
3. In the Concept Console Window type: find $location Note: find $LOCATION can be copied, then Ctrl V to paste in each page. Paste does not work?
   A group will be created and the number of occurrences found on that page, will be
   listed in the Console Window along with the group name. See example below:
   
4. Either Type: change "group name" Enter appropriate group name. (i.e.) change A in cmmand window
   (OR) Select Group / Text Change [A] pull-down menu
   
   Note: All members of the group should be temporarily hilited.
   Note: If group selections are "grayed out", then select the correct group in the group tool bar.
   (below the schematic)
   
   
   
5. Next, Rt Click and select Editor (see below) or type Ctrl+E.
   The window seen below will appear.

   
   
   Note: This will start the Text Editor tool and display a listing of ALL group members...
   

    
6. From the pull-downs, select Edit / Replace. A window will appear.
   
    
7. On the Find line enter $LOCATION (This is case sensitive.)
   On the Replace line enter LOCATION
   Select Replace All.
   
   Note: When complete select File->Save in the text editor. You may then close the Text Editor.
   
    
8. In Concept select File->Save to write the schematic page.
    
9. Repeat for all schematic pages

Hi Jerry,

Thanks for the help.  I don't have a small test case.  I could try making
one...and perhaps in the morning, I may try that.  This is pretty
frustrating.  I know it worked correctly at one time, as an older BOM has
the correct REFDESs, but every new BOM/netlist I generate has the REDESs
redone.  I really wouldn't care if they were redon if when I read it in to
the layout, it didn't unpace components that shouldn't be unplaced...and
therefore get their traces ripped up.

So, I'll figure out what to try next in the morning.  It's been a very
frustrating afternoon/evenin/night trying to figure out what's going on
here.

Best Regards,

Austin


Original Message:
-----------------
From: Jerry Grzenia geraldg@xxxxxxxxxxx
Date: Mon, 18 Apr 2011 18:23:17 -0700
To: icu-pcb-forum@xxxxxxxxxxxxx, icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro
Design Entry HDL...


Hi Austin,

If you have a small testcase, please send it to Customer Support, we'll
take a look at it for you.



Regards,

Jerry Grzenia

 -----Original Message-----
From: 	allegrolist@xxxxxxxxxxxx [mailto:allegrolist@xxxxxxxxxxxx]
Sent:	Monday, April 18, 2011 04:25 PM Pacific Standard Time
To:	icu-pcb-forum@xxxxxxxxxxxxx
Subject:	[PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro
Design Entry HDL...

Hi Jerry,

I do exactly both of those, and it still redoes the REFDESs.  It makes them
sequential, and fills in the gaps.  I'm obviously missing something, and
it's very frustrating.  I've tried quite a few things, just not hit on the
right one yet.

Thanks!

Austin

Original Message:
-----------------
From: Jerry Grzenia geraldg@xxxxxxxxxxx
Date: Mon, 18 Apr 2011 14:01:05 -0700
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro
Design Entry HDL...


Hi Austin,



First, don't "repackage". In the Export Physical form, make sure you have
"Preserve" checked:

[cid:image001.png@01CBFDE1.D26367B0]



Click on the Advanced button (upper right above), select the Layout tab.

Make sure the option for "Reuse Ref Des numbers" is NOT checked:

[cid:image002.png@01CBFDE1.D26367B0]



Jerry



-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of
allegrolist@xxxxxxxxxxxx
Sent: Monday, April 18, 2011 3:31 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] How do I preserve REFDESs when packing in Allegro
Design Entry HDL...



Hi,



Every time I repackage (Design Entry HDL, 15.7), it reassigns the REFDESs.

I want to keep the existing REFDESs (and their gaps).  How can I specify

this?



Thanks,



Austin





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