[PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro Design Entry HDL...

  • From: Jerry Grzenia <geraldg@xxxxxxxxxxx>
  • To: "icu-pcb-forum@xxxxxxxxxxxxx" <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Tue, 19 Apr 2011 08:09:58 -0700

Correct Mark. You will do the opposite of the Solution (use it as a guideline).

You do type in $LOCATION (it doesn’t have to be in the pull-down list), and 
you’d select the ++PRESERVE SOURCE VALUE++ as the value.

Jerry

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx 
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: Tuesday, April 19, 2011 9:56 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro 
Design Entry HDL...

Austin,
Glad it worked for you. I have no idea why the $ is there to allow any changes, 
but this is our way around it.

Jerry,
Thanks for the solution link to globally updating this. I will give it a try
I have not been able to do this globally in the past because $LOCATION is not a 
pull-down selection.

I would need to do the reverse of this solution. It changes LOCATION (*)  to 
$LOCATION : Value = ++PRESERVE SOURCE VALUE++ (from drop down)
I will have to add a few $LOCATION, then try replacing $LOCATION with LOCATION.
$LOCATION is still not in the pull-down. Can I type it in and it will take it?
I would have to select the ++ Preserve thing in the $ LOCATION change from 
value field...right?

Regards,
Mark

On 4/19/2011 8:33 AM, Jerry Grzenia wrote:
Hi Mark and Austin,

Mark’s suggestion will “lock” the values. Mark – your method works fine. You 
might want to try though the Global Update command – it’s a very quick method 
to accomplish the same thing – but, it’s done across all pages of an entire 
design (flat or hierarchical).

You can reference this Cadence Online Support Solution –
http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:ViewSolution;solutionNumber=11552114

Using it as a guide, just change the $LOCATION to LOCATION with preserve mode.

Austin – I can understand your frustration. Instead of making a new testcase, 
you can contact Customer Support and send your existing design as is – so we 
can find the cause of why the ref des values keep changing.

Jerry

From: 
icu-pcb-forum-bounce@xxxxxxxxxxxxx<mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx> 
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: Tuesday, April 19, 2011 5:40 AM
To: icu-pcb-forum@xxxxxxxxxxxxx<mailto:icu-pcb-forum@xxxxxxxxxxxxx>
Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro 
Design Entry HDL...

Austin,
We usually replace $LOCATION with LOCATION for every ref des if this happens.
It hard locates all ref des instead of $LOCATION (Soft location)
Unfortunately, you have to do find / replace on each page.
Start the Project Manager and open your project.
Start Design Entry

In the Concept Console Window type: find $location Note: find $LOCATION can be 
copied, then Ctrl V to paste in each page. Paste does not work?
A group will be created and the number of occurrences found on that page, will 
be
listed in the Console Window along with the group name. See example below:
[cid:image001.jpg@01CBFE79.E9480420]
Either Type: change "group name" Enter appropriate group name. (i.e.) change A 
in cmmand window
(OR) Select Group / Text Change [A] pull-down menu
[cid:image002.jpg@01CBFE79.E9480420]
Note: All members of the group should be temporarily hilited.
Note: If group selections are "grayed out", then select the correct group in 
the group tool bar.
(below the schematic)
[cid:image003.jpg@01CBFE79.E9480420]
[cid:image004.jpg@01CBFE79.E9480420][cid:image005.jpg@xxxxxxxxxxxxxxxxx]
Next, Rt Click and select Editor (see below) or type Ctrl+E.
The window seen below will appear.

[cid:image006.jpg@01CBFE79.E9480420]



Note: This will start the Text Editor tool and display a listing of ALL group 
members...

[cid:image007.jpg@01CBFE79.E9480420]

From the pull-downs, select Edit / Replace. A window will appear.
[cid:image008.jpg@01CBFE79.E9480420]

On the Find line enter $LOCATION (This is case sensitive.)
On the Replace line enter LOCATION
Select Replace All.
[cid:image009.jpg@01CBFE79.E9480420]
Note: When complete select File->Save in the text editor. You may then close 
the Text Editor.


In Concept select File->Save to write the schematic page.

Repeat for all schematic pages


Regards,
Mark

On 4/18/2011 11:25 PM, 
allegrolist@xxxxxxxxxxxx<mailto:allegrolist@xxxxxxxxxxxx> wrote:

Hi Jerry,



Thanks for the help.  I don't have a small test case.  I could try making

one...and perhaps in the morning, I may try that.  This is pretty

frustrating.  I know it worked correctly at one time, as an older BOM has

the correct REFDESs, but every new BOM/netlist I generate has the REDESs

redone.  I really wouldn't care if they were redon if when I read it in to

the layout, it didn't unpace components that shouldn't be unplaced...and

therefore get their traces ripped up.



So, I'll figure out what to try next in the morning.  It's been a very

frustrating afternoon/evenin/night trying to figure out what's going on

here.



Best Regards,



Austin





Original Message:

-----------------

From: Jerry Grzenia geraldg@xxxxxxxxxxx<mailto:geraldg@xxxxxxxxxxx>

Date: Mon, 18 Apr 2011 18:23:17 -0700

To: icu-pcb-forum@xxxxxxxxxxxxx<mailto:icu-pcb-forum@xxxxxxxxxxxxx>, 
icu-pcb-forum@xxxxxxxxxxxxx<mailto:icu-pcb-forum@xxxxxxxxxxxxx>

Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro

Design Entry HDL...





Hi Austin,



If you have a small testcase, please send it to Customer Support, we'll

take a look at it for you.







Regards,



Jerry Grzenia



 -----Original Message-----

From:    allegrolist@xxxxxxxxxxxx<mailto:allegrolist@xxxxxxxxxxxx> 
[mailto:allegrolist@xxxxxxxxxxxx]

Sent:    Monday, April 18, 2011 04:25 PM Pacific Standard Time

To:      icu-pcb-forum@xxxxxxxxxxxxx<mailto:icu-pcb-forum@xxxxxxxxxxxxx>

Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro

Design Entry HDL...



Hi Jerry,



I do exactly both of those, and it still redoes the REFDESs.  It makes them

sequential, and fills in the gaps.  I'm obviously missing something, and

it's very frustrating.  I've tried quite a few things, just not hit on the

right one yet.



Thanks!



Austin



Original Message:

-----------------

From: Jerry Grzenia geraldg@xxxxxxxxxxx<mailto:geraldg@xxxxxxxxxxx>

Date: Mon, 18 Apr 2011 14:01:05 -0700

To: icu-pcb-forum@xxxxxxxxxxxxx<mailto:icu-pcb-forum@xxxxxxxxxxxxx>

Subject: [PCB_FORUM] Re: How do I preserve REFDESs when packing in Allegro

Design Entry HDL...





Hi Austin,







First, don't "repackage". In the Export Physical form, make sure you have

"Preserve" checked:



[cid:image001.png@01CBFDE1.D26367B0]







Click on the Advanced button (upper right above), select the Layout tab.



Make sure the option for "Reuse Ref Des numbers" is NOT checked:



[cid:image002.png@01CBFDE1.D26367B0]







Jerry







-----Original Message-----

From: 
icu-pcb-forum-bounce@xxxxxxxxxxxxx<mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx>

[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of

allegrolist@xxxxxxxxxxxx<mailto:allegrolist@xxxxxxxxxxxx>

Sent: Monday, April 18, 2011 3:31 PM

To: icu-pcb-forum@xxxxxxxxxxxxx<mailto:icu-pcb-forum@xxxxxxxxxxxxx>

Subject: [PCB_FORUM] How do I preserve REFDESs when packing in Allegro

Design Entry HDL...







Hi,







Every time I repackage (Design Entry HDL, 15.7), it reassigns the REFDESs.



I want to keep the existing REFDESs (and their gaps).  How can I specify



this?







Thanks,







Austin











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