[PCB_FORUM] Re: Disappearing Vias
- From: "Jean Bratton" <jean.bratton@xxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Mon, 21 May 2007 09:12:30 -0700
One thing I used to do is be sure all vias are attached to at least one
internal plane. You can tell how many planes a via is connected to by
doing a "show element" on it. If it's only connected to the external
planes, and there's an internal plane of the right kind in the area,
doing a move "ix 0 0" on the via will usually get it to acknowledge the
internal connections too. Once they're associated, I've never seen them
go away. I agree with Gary, though, since I've been using the "retain
net of vias" I have not seen this problem.
Jean
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Macindoe, Gary
Sent: Monday, May 21, 2007 11:01 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Disappearing Vias
Richard,
Yes, I've seen it in the past, but not lately. Whenever I need
stitching vias, when I copy them, I use the "Retain net of vias" switch
(Options tab).
Intermittent problems are enough to make you scream! Good luck.
Gary
Gary E. MacIndoe
PCB Design Engineer
Fort Collins, Colorado
amd.com
gary.macindoe@xxxxxxx
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of richard moffat
Sent: Sunday, May 20, 2007 9:38 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Disappearing Vias
Hello all
Allegro 15.7, Windoze XP. We first saw this problem several years ago,
probably around 14.0 or 14.2.
Every so often Allegro would rip up stitching vias on planes, just
leaving one. Needless to say, this is not a good thing.
It seems to be some 'gloss' function, but we never use it. It's totally
random, although it always seems to be on outer layers. We're lucky
this has never happened to a fab. It's always been spotted by some
diligent CAD engineer before release.
We submitted this to Cadence a long time ago but we can't repeat it. No
solution was offered. Has anyone else ever seen this?
(Example attached, png file.)
Cheers,
Richard
__________________________
Richard Moffat
PCB CAD Team Leader
Allied Telesis Labs
ph. +64 (3) 3393000
richard.moffat@xxxxxxxxxxxxxxxxxxx
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